One of the great strengths of an FPGA-based design is that the routing challenge can be moved from the PCB to inside the FPGA, potentially resulting in fewer routing layers and a simpler, cheaper and more reliable PCB. For this to be a reality the design system must support both PCB-driven and FPGA-driven pin swaps, with full synchronization between the PCB and FPGA designs – Altium Designer provides this high-level of support.

The best way to exploit this advantage is to route the board in an iterative process – escape routing out of the FPGA, then routing incoming signal buses toward the FPGA. Once the incoming and outgoing routes are near each other it is a straightforward process of performing interactive or automatic pin swaps on the FPGA escape routing to de-tangle the connection lines, ready to complete the routing.

With the new subnet jumper feature you no longer need to manually complete the short routing segments. Selecting Add Subnet Jumpers from the Autoroute menu will detect any direct (horizontal, vertical, diagonal) connection line shorter than the specified distance, then automatically add a track segment of the correct width to complete the route.

And, since the reality is that design does not happen in a simple, linear fashion, you have full support to remove the subnet jumpers when you need to re-adjust the FPGA pinouts and perform further pin swaps, to again de-tangle the connection lines.

Use the Remove Subnet Jumpers command to remove the jumpers, and Add Subnet Jumpers to recreate them.