Just picture it, a fine wine, a gourmet meal and an engaging conversation ... only to be marred by the encroaching voice of the guest at the next table. Just like a poorly-tuned radio, I could barely hear the conversation at my own dinner table. Quite cross that we couldn't talk, we decided to give up and leave early. In the world of high-speed digital design, a similar situation is played out, with noisy signals affecting their quieter neighbors to the extent that they can't deliver their 'messages' accurately. As higher speed devices become more common, the need for distributed circuit analysis at the board design stage becomes crucial. Where signals are produced with edge rates under a nanosecond, careful analysis of board impedances is necessary to ensure proper termination of signal lines, minimizing reflections on those lines and ensuring electromagnetic interference (EMI) falls within often regulated guidelines. Ultimately, you need to ensure the integrity of the signals across the board or, put another way, achieve good signal integrity. Thinking literally, this term simply means the analysis of a signal's integrity. Unlike circuit simulation, which deals with the functional operation of the circuit, but assumes perfect interconnects, signal integrity analysis concentrates on the interconnection between devices – the source driving pin, the destination receiver pin and the transmission line that connects them. The components themselves are only modeled in terms of the I/O characteristics of their pins. When we analyze a signal's integrity, we are simply checking (and expect to see minimal-to-no-change in) the quality of the signal – after all, what comes out of the source pin should ideally arrive at the destination pin with no deterioration along the transmission line. If you send a letter in the post to Grandma, you don't expect a parcel to appear on her doorstep right? The connections between device pins are modeled using transmission line techniques that factor in the length of the trace, the characteristic impedance of the trace at a defined stimulus frequency, and the termination characteristics at each end of the connection. Analysis itself typically involves a general, fast analysis to quickly identify problem signals – often referred to as screening analysis – as well as more detailed analyses that investigate reflections (reflection analysis) and EMI (crosstalk analysis). The sooner the better! Imagine the pain and suffering, not to mention the red face and tarnished reputation – if control signals on a prototype board were found to suffer from intermittent noise glitches, resulting in detrimental circuit functionality. Design these days is all about reliability, integrity (there's that word again) cost-effectiveness and quick time to market. Being able to resolve signal integrity issues at the earliest possible stage in the design process would result in less prototype iterations in order to complete a given design project. Many EDA tools provide the ability to analyze the integrity of signals both prior to, and during, board layout. It's true that the full signal integrity picture can only be seen when the board is fully routed, especially in terms of crosstalk analysis, but often dealing with reflection problems (the bells the bells) can pretty much reduce EMI effects to required levels anyway. The majority of signal integrity issues are due to reflections. The remedy, as detailed at a practical level in the article Ensuring the Integrity of Signals, is to compensate for impedance mismatches by suitable introduction of termination components. If analysis is performed at the design capture stage, termination components can be added relatively quickly and straightforwardly to the design. The same analysis can obviously be done at the board layout stage, but adding termination components after the board has been laid out can be both time consuming and tricky – especially on dense boards. A darn good strategy – one many engineers live by – is to run signal integrity analysis after the design is captured, just prior to the board layout phase. Deal with any reflection issues, place any terminations as required. Then take the design over to the PCB and route using track widths that are based on desired transmission line impedances, and run the analysis again. Check on signals that were flagged as being problematic at the capture stage. Also run a Crosstalk analysis to ensure EMI is at acceptable levels. The cause of reflections on a signal's transmission line is typically due to impedance mismatches. Basic electronics dictates that an output will have low impedance, while an input will have high impedance. To reduce the reflections and obtain clean signal waveforms – free of the characteristic ringing – requires that the impedances be better matched. The solution typically involves adding a termination resistor or RC network at the relevant point in the design, thus matching termination impedances and minimizing reflections. In addition, routing of the PCB with regard to impedance is also a key element in ensuring better signal integrity. This is often referred to as 'impedance-controlled routing'. The level of crosstalk (or the extent of EMI) is directly proportional to the reflections on a signal line. If the signal quality conditions are achieved and reflections are brought down to a near-negligible level – delivering the signal to its destination with minimal signal stray – crosstalk will also be minimized. The 'Holy Grail' for the design engineer is simply to attain the best signal quality possible through correct signal termination and constrained routing impedance on the PCB. EMI considerations are typically very stringent, but with good signal integrity analysis practices integrated into your design flow, your designs will comfortably meet even the toughest of specifications. For a look at what Altium Designer brings to the table in terms of Signal Integrity analysis, refer to the article Ensuring the Integrity of Signals.What exactly is Signal Integrity analysis?
Where and when would I use this?
Termination – end of the road for signal integrity issues
The Holy Grail