Full listing of SP2 for Altium Designer
Embedded Systems Development
TSK3000A 32-bit RISC Processor 
The new TSK3000A RISC processor has been specifically designed to minimize the complications and complexity usually associated with 32-bit system design. The processor is internally based on the Harvard architecture, but features a simple memory structure and hardware-based vectored interrupt handling to make coding simpler.
Support for Power PC in the Xilinx® Virtex-II® Pro
Full embedded software development support for the immersed Power PC core in Xilinx® Virtex-II Pro FPGAs. The tool chain includes a highly-optimizing C compiler and source-level debugger for the MCU. The software development tool chain is fully integrated with the Nexar development environment, allowing designers to fully utilize the core within the LiveDesign process.
TSK52 Processor
The TSK52x is an 8-bit embedded controller that executes all ASM51 instructions and is instruction set compatible with the 80C31.
TSK52B_W Processor
TSK52B_W Core has been released. This is a Wishbone version of the TSK52 core.
Wishbone-based Interconnect Components
The memory and I/O management features introduced in SP2 allow you to quickly build up the design and manage the memory and I/O to processor interfacing. This is possible because of the specialized interconnection components, including the Wishbone Interconnect and the Wishbone Bus Master.
Wishbone dual master
The WB_DUALMASTER peripheral device provides a simple means of sharing a slave Wishbone device between two masters - for example, sharing a physical memory device between either two processors or a processor and a memory-based peripheral, such as a VGA Controller.
System interface peripherals - Wishbone interconnect
The WB_INTERCON peripheral provides a means of accessing multiple Wishbone-compliant slave devices over a single Wishbone interface. Connecting directly to the External Memory and Peripheral I/O Interfaces of the TSK3000A 32-bit RISC processor, the device facilitates communication with multiple physical memory devices or Wishbone-compliant peripherals.
RAM controller
The MEM_CTRL is a Wishbone-compliant configurable memory controller that supports interfacing between off-chip static RAM, or on-chip FPGA block RAM, and the TSK3000A processor.
Ethernet Media Access Controller - EMACx
The EMACx (Ethernet Media Access Controller) family of peripheral devices provides an interface between a processor and a standard Physical Layer device (PHY) in accordance with IEEE802.3 Media Independent Interface (MII).
Configurable Processors
Each configurable component has its own configuration dialog, including the different processors available in Nexar™ The processor has separate commands and dialogs to configure memory and peripherals, but it also supports mapping peripherals into memory space (and the memory into peripheral space), if required.
Configurable Interconnect Components
Structuring the system is greatly simplified by the configurable nature of the system interconnect components included in SP2.
TSK3000A Software Performance Profiler
The TSK3000A embedded tools now includes a profiler, use this during simulation to collect statistical data about your executing code, allowing you to analyze which functions are called, how often, and what their execution time is.
Support for multiple Code and Data Sections in FPGA-based processor memories
Outputs generated from an embedded project can now include data and code sections that can be specifically targeted to different areas of the memory of the target processor. In the case of the TSK3000, these sections are written to a single file in the ELF format.
Memory and peripheral mapping
It is now easier to view and define the memory map for an embedded application with a new memory mapping feature. Mapping covers both peripherals and memory devices, and allows you to easily define memory spaces directly from the hardware block diagram. The editor also presents a graphical visualization of how all of the sections of the memory space fit together.
New version of the TSK80A and TSK80A_D 
This is a new smaller, faster TSK80 processor which should be fully replaceable with the old processor. This new processor can be run at around 50Mhz and is around 30-40% smaller than the original.
Embedded Project Configuration and Management
The embedded project and document options dialog has been greatly improved with a new user interface and more options including a new Processor Memory Configuration page.
Improved Code Editing
Double clicking on a compile error now jumps to the correct location in the source code. Also, document switching now prioritizes switching order based on when last edited, making multi-file editing more efficient
Enhanced Debugging Technology
There have been numerous enhancements made to the FPGA core processor debugging technology.
These include:
- Debug in files not explicitly included in the embedded project
- General improvements to Watches and Evaluate panels
- Improved Evaluation engine