Vias are used to create the vertical, or layer-to-layer connections in a printed circuit board.
In the early days of board fabrication, all of the vias passed all the way through the board, from one side to the other. These thruhole vias are drilled after the layers are fabricated and the routing etched. The conductive via barrels are formed in the drilled holes using an electro-less plating process, completing the layer-to-layer connections.
The development of PCB fabrication technology saw the introduction of multilayer boards, and with it, the ability to drill vias between other pairs of layers. By drilling vias at certain points during the fabrication process, it was possible to create vias that only spanned two adjacent signal layers. These are referred to as blind vias (from a surface layer to the next layer in) and buried vias (between two internal layers).
Improvements in fabrication techniques and the introduction of laser drilling gave the ability to create very small (<10 mil) vias, formed from a surface layer to the next signal layer down. These are referred to as µVias. By creating µVias as the layers are built-up during the fabrication process (referred to as sequential lamination, or sequential build-up), it is now possible to form a stack of µVias that deliver seamless layer-to-layer signal transitions.
All of these Via Types are supported in Altium Designer.
The Via Types tab of the Layer Stack Manager is used to define the layer-spanning (Z-plane) requirements of each via type. The size properties of the via, including the diameter and hole size, are not defined in the Via Types tab.
The size properties of the via are defined by:
Main article: Constraining the Design - Design Rules
Vias that are placed during interactive routing or ActiveRouting have their size properties controlled by the applicable Routing Via Style design rule. To help target vias in the design rule, there is a set of via-related query keywords that you can use in the rule scope (Where the Object Matches), these are detailed below.
When you perform a layer change as you route, the software looks at the start and stop layers for this layer change, and chooses an allowed Via Type from the Layer Stack Manager. It then identifies the highest priority applicable Routing Via Style design rule and applies the via size settings from the Constraints section of that rule, to the via about to be placed.
For example, you might have a set of
DRAM_DATA nets that require µVias for the
TopLayer - to -
S2 layer transition and the
S2 - to -
S3 layer transition, and a drilled thru hole via for all other layer transitions (which is also different to the via required by other nets). This can be handled by creating two Routing Via Style design rules to target these
DRAM_DATA nets. An example of a suitable µVia design rule is shown below, hover the cursor over the image to show the thruhole design rule.
To simplify the process of scoping Routing Via Style design rules, the following via-related query keywords are available:
|Via Type Query||Returns|
|IsVia||All via objects, regardless of the Via Type.|
|IsThruVia||All vias that span from the top layer to the bottom layer.|
|IsBlindVia||All vias that start on a surface layer and end on an internal layer, that are not a µVia.|
|IsBuriedVia||All vias that start on an internal layer and end on another internal layer, that are not a µVia.|
|IsMicroVia||All vias that have the µVia option enabled, and connect adjacent layers.|
|IsSkipVia||All vias that have the µVia option enabled, and span 2 layers.|
When you change layers during interactive routing the software will automatically insert a via. As described above, the via that is chosen depends on:
User Choice; with the current Via-Size mode being displayed on the Heads Up display and the Status bar (as shown in the image above). If User Choice is selected, press Shift+V to open the Choose Via Sizes dialog, and select a preferred via size. The list of available via sizes displayed in the dialog is taken from the list of vias already used in the design, inspect these in the Pad and Via Templates mode of the PCB panel.
µVias are used as the interconnects between layers in high density interconnect (HDI) designs, to accommodate the high input/output (I/O) density of advanced component packages and board designs. Sequential build-up (SBU) technology is used to fabricate HDI boards. The HDI layers are usually built up onto a traditionally manufactured double-sided core board or a multilayer PCB. As each HDI layer is built on to each side of the traditional PCB, µVias can be formed using: laser drilling, via formation, via metalization, and via filling. Because the hole is laser drilled, it has a cone shape.
If a connection required a path through multiple layers, the original approach was to stagger a series of µVias using a step-like pattern. Improvements in technology and processes now allow µVias to be stacked directly on top of each other.
Buried µVias are required to be filled, while blind µVias on the external layers do not require filling. Stacked µVias are usually filled with electroplated copper to make electrical interconnections between the multiple HDI layers and provide structural support for the outer level(s) of the µVia.
The PCB drill table and drill-type output files support µVias.
The PCB Drill Table includes µVia drill pairs.
NC Drill - a separate file is created for each µVia drill pair.
Gerber X2 - specific setup entries for each µVia plot.
ODB++ - a separate drill fabrication file created for each µVia drill pair.
Main article: Controlled Depth Drilling, or Back Drilling
Back drilling, which is also known as Controlled Depth Drilling (CDD), is a technique used to remove the unused portion, or stub, of copper barrel from a thru-hole in a printed circuit board. When a high-speed signal travels between PCB layers through a copper barrel, it can be distorted. If the signal layer usage results in a stub being present, and the stub is long, then that distortion can become significant.
These stubs can be removed by re-drilling those holes after the fabrication is complete, with a slightly larger drill. The holes are back drilled to a controlled depth, close to, but not touching, the last layer used by the via. Allowing for fabrication and material variations, a good fabricator can back drill holes to leave a 7 mil stub, ideally the remaining stub will be less than 10 mil.
Back Drilling is enabled in the Layer Stack Manager's Tools menu, and then configured in the Back Drills tab of the Layer Stack Manager.