Altium Designer Documentation

Add Shielding to Net

Modified by Phil Loughhead on Jun 16, 2017


The Add Shielding to Net dialog.

Summary

A via shield is used to create a vertical copper barrier through the PCB, to help reduce crosstalk and electromagnetic interference in a route that is carrying an RF signal. A via shield, also known as a via fence or a picket fence, is created by placing one or more rows of vias alongside a signal route. 

Access

In the PCB Editor, run the command Tools » Via Stitching/Shielding » Add Shielding to Net.

Options/Controls

Shielding Parameters

The shielding parameters control the shielding vias' placement pattern, and their clearance from other-net and same-net objects.

  • Net to shield - Net to have shielding vias placed around.
  • Selected Objects - Place shielding vias around the selected objects, rather than the entire net selected in the Net to shield field.
  • Stagger alternate rows - Alternate rows of shielding vias are offset by half of the Grid value.  
  • Row Spacing - Spacing between rows of shielding vias (edge to edge separation), when Rows setting is greater than 1. 
  • Distance - Separation from the edge of the shielded net track segments, to the edge of the shielding vias.
  • Grid - The distance between the edges of adjacent shielding vias. Shielding vias will not be placed in violation of applicable design rules; if a potential via site would result in a violation then that site is skipped.  
  • Rows - Number of rows of shielding vias.
  • Add shielding copper - Place a polygon over the area occupied by the shielding vias, connected to the net specified in the Via Net field. The polygon is defined in accordance with the applicable Clearance constraint and Polygon Connect Style design rules.
  • Add clearance cutout - Include a polygon cutout around the shielded net, set back from the net by the distance specified in the Distance field. Use this when you require a different clearance from the applicable Clearance constraint design rule. 

Via Style

The shielding Via Style can be configured manually in the Add shielding to Net dialog, or imported from the applicable Routing Via Style design rule by clicking the Load values from Routing Via Style Rule button. Clicking this button will load the Preferred rule settings. 

Diameters

  • Simple - Via Style (Hole size and diameter) is the same through all layers.
    • Hole size - Specify the hole size value for the Via.
    • Diameter - Specify the diameter for the Via.
  • Top-Middle-Bottom - Different Hole Size and Diameters can be set at Top Layer, Middle Layer and Bottom Layer respectively.
    • Hole size - Specify the hole size value for the Via.
    • Top Layer - Specify via size for top layer.
    • Middle Layer - Specify via size for Middle layer.
    • Bottom Layer - Specify via size for Bottom layer.
  • Full Stack - Different Hole Size and Diameters can be edited at each layer(including all signal layers and planes).
    • Hole size - Specify the hole size value for the Via.
    • Edit Full Stack Via Sizes - Click to open Via Layer Editor dialog, in which to specify via settings for each layer stack.

Via Template

  • Template - Select a via template from the dropdown.
  • Library - Displays which library the via template is linked to and includes the option to unlink the template from said library.

Properties

  • Drill Pair - The layers that this via starts and ends on.
  • Net - The net that the via is currently assigned to. Change the net assignment by clicking in the field and choosing a net from the drop down list. Select No Net to specify that the via is not connected to any net. The Net property of a primitive is used by the Design Rule Checker to determine if a PCB object is legally placed.
  • Locked - Enable this option to protect the via from being edited graphically. Lock a via whose position is critical. If you try to edit a primitive that is locked, you will be informed that the primitive is locked and asked if you wish to proceed with the action. If this option is unchecked, the primitive can be freely edited without confirmation.

The Start Layer and End Layer settings define a via to be one of the following types:

  • Multi-layer (Thru-Hole) - this type of via passes from the Top layer to the Bottom layer and allows connections to all internal signal layers.
  • Blind - this type of via connects from the surface of the board to an internal electrical layer.
  • Buried - this type of via connects from one internal electrical layer to another internal electrical layer.

Solder Mask Expansions

  • Expansion value from rules - Enable this option to allow the existing solder mask expansion rule to take effect on this pad object. Check the Mask design category from the PCB Rules and Constraints Editor dialog.
  • Specify expansion value - Enable this Specify expansion value option to edit the expansion value and the solder mask expansion design rule is overridden for this pad.
  • Force complete tenting on top - Enable the Force complete tenting on top option and any solder mask settings in the solder mask expansion design rules will be overridden and results in no opening in the solder mask on top layer of this pad. 
    Disable this option and this pad is affected by a solder mask expansion rule or specific expansion value.

  • Force complete tenting on bottom - Enable the Force complete tenting on bottom option and any solder mask settings in the solder mask expansion design rules will be overridden and results in no opening in the solder mask on the bottom layer of this pad. 
    Disable this option and this pad is affected by a solder mask expansion rule or specific expansion value. 

Drill Pairs - Click this button to open the Drill-Pair Manager dialog, which allows the designer to configure the required drill pairs for the active layer stack.

Tips

  • Each set of shielding vias are added to a union. The set can be removed by running the Tools » Via Stitching/Shielding » Remove Via Shielding Group command, then clicking on any via in the group.
Found an issue with this document? Highlight the area, then use Ctrl+Enter to report it.

联系我们

联系原厂或当地办公室

We're sorry to hear the article wasn't helpful to you.
Could you take a moment to tell us why?
200 characters remaining
You are reporting an issue with the following selected text
and/or image within the active document:
Altium Designer 免费试用
Altium Designer Free Trial
我们开始吧!首先,您或者您的公司已经在使用Altium Designer了吗?

如果您有任何需求,请点击这里联系获取当地办公室销售代表联系方式。.
Copyright © 2019 Altium Limited

既然您在使用Altium Designer,为何仍需要试用?

如果您有任何需求,请点击这里联系获取当地办公室销售代表联系方式。.
Copyright © 2019 Altium Limited

好的,实际上您无需下载一个试用版本。

点击下方按钮下载最新版本的Altium Designer安装包

下载Altium Designer 安装包

如果您有任何需求,请点击这里联系获取当地办公室销售代表联系方式。.
Copyright © 2019 Altium Limited

填写下方表格,获取Altium Designer最新报价。

点击[获取免费试用],并同意我们的隐私政策。您会接收到来自Altium的资讯,并允许其改变您的通知首选项。

如果您是Altium维保期内客户,您不需要下载试用版本。

如果您不是Altium维保客户,请填写下方表格免费试用。

点击[获取免费试用],并同意我们的隐私政策。您会接收到来自Altium的资讯,并允许其改变您的通知首选项。

您为何想要试用Altium Designer?

如果您有任何需求,请点击这里联系获取当地办公室销售代表联系方式。.
Copyright © 2019 Altium Limited

那您来对地方了!请填写下方表格申请试用吧。

点击[获取免费试用],并同意我们的隐私政策。您会接收到来自Altium的资讯,并允许其改变您的通知首选项。

Great News!

Valid students can get their very own 6-month Altium Designer Student License for FREE! Just fill out the form below to request your Student License today.

点击[获取免费试用],并同意我们的隐私政策。您会接收到来自Altium的资讯,并允许其改变您的通知首选项。

好的,您可以下载免费的Altium Designer Viewer查看文档,有效期6个月。

请填写下方表格申请。

点击[获取免费试用],并同意我们的隐私政策。您会接收到来自Altium的资讯,并允许其改变您的通知首选项。

好棒!创作是一件超酷的事情,我们可以为您提供完美的设计软件。

Upverter是一个社区导向的交流平台,专为您这样的创客量身定做。

点击这里看看吧!

如果您有任何需求,请点击这里联系获取当地办公室销售代表联系方式。.
Copyright © 2019 Altium Limited

好的,您可以下载免费的Altium Designer Viewer查看文档,有效期6个月。

请填写下方表格申请。

点击[获取免费试用],并同意我们的隐私政策。您会接收到来自Altium的资讯,并允许其改变您的通知首选项。