Altium Designer Documentation

Working with the Layer Pairs Design Rule on a PCB in Altium Designer

Created: September 24, 2021 | Updated: September 24, 2021
All Contents

Rule category: Manufacturing

Rule classification: Unary

Summary

This rule checks to ensure that the used via types match the currently defined via types. The used via types are determined from the vias and pads found in the board. The permissible via types are defined on the Via Types tab of the Layer Stack Manager.

All design rules are created and managed within the PCB Rules and Constraints Editor dialog. For a high-level view of working with the design rules system, see Defining, Scoping & Managing PCB Design Rules.

Constraints

Default constraint for the Layer Pairs rule.
Default constraint for the Layer Pairs rule.

Enforce layer pairs settings – specifies whether the check is made or not.

How Duplicate Rule Contentions are Resolved

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application

Online DRC, Batch DRC, and during interactive routing.

Found an issue with this document? Highlight the area, then use Ctrl+Enter to report it.

Contact Us

Contact our corporate or local offices directly.

We're sorry to hear the article wasn't helpful to you.
Could you take a moment to tell us why?
200 characters remaining
You are reporting an issue with the following selected text
and/or image within the active document: