A common requirement on a printed circuit board is large areas of copper. It could be a hatched region of grounding copper on an analog design, a large, solid region of copper for carrying heavy power supply currents, or a solid ground area for EMC shielding. In Altium NEXUS, areas of copper can be defined using three different design objects: Fills, Solid Regions and Polygon Pours. The advantage of a Polygon Pour is that it automatically pours around copper objects that belong to another net in accordance with the applicable Electrical Clearance and Polygon Connect Style Design Rules.
A fill (Place » Fill) is a rectangular-shaped design object that can be placed on any layer, including copper (signal) layers. Fills are limited to a rectangular shape and will not avoid other objects, such as pads, vias, tracks, regions, other fills or text. If a Fill is placed on a signal layer, it can be connected to a Net.
A region (Place » Solid Region) is a design object that is used for defining polygonal shapes. A Solid Region (commonly called Region) can be placed on any layer including signal (copper) layers. Like a Fill, a Region does not avoid other objects, such as pads, vias, tracks, fills, other regions or text. If a region is placed on a signal layer, it can be connected to a Net.
A region object has a number of special properties that allow it to be used for:
Polygon pours (also called copper pours) are used to create regions of copper on a PCB.
A Polygon Pour (Place » Polygon Pour) that is placed on a signal layer creates a polygonal (multi-sided) area of copper that can either be solid or hatched. As they are poured, polygons automatically allow for clearances around electrical objects belonging to a different net, connect to objects of the same net, and fill irregularly shaped areas. Clearances and connection properties are controlled by the applicable Electrical Clearance and Polygon Connection Style design rules.
Select the Place » Polygon Pour command from the main menus to place a polygon on the current layer in the PCB editor. After the command is run, the cursor will change to a crosshair and you will enter polygon pour placement mode. Press the Tab key to pause placement and access the Polygon Pour mode of the Properties panel in which you can set the fill and net connection options and pour-around properties.
When you place a polygon, you are defining the outline of the polygon object. Once the outline is complete, the polygon will automatically fill in accordance with the Fill Mode and other options selected in the Properties panel.
There are three supported Fill Modes: Solid, Hatched or None.
Solid - When this mode is selected, the polygon is internally constructed from solid region objects, with a separate region for each contiguous area of copper in the completed polygon. This type of polygon is output to Gerber using Gerber region definitions. Note that circular cutouts are not supported in the Gerber region definition, so the arcs (holes) for circular cutouts are actually approximated by straight chord sections. The accuracy of these is defined by the Arc Approx. setting in the Properties panel. Polygons of this type are generally faster to pour and result in smaller PCB and Gerber file sizes.
Hatched - When this mode is selected, the polygon is created from track and arc objects. By adjusting the Track Width and Grid Size settings of the track/arc objects, the completed polygon can either be hatched or solid in appearance. Polygons of this type are generally slower to pour and result in larger PCB and Gerber file sizes. Hatched polygons are often used in analog designs. Note that the outline of a hatched polygon is created from tracks and arcs with the user-defined edge of the polygon at the center-line of the outline tracks and arcs.
None - this mode is essentially the same as the Hatched mode. It also uses tracks and arcs to define the boundaries, but the fill-in tracks and arcs are not added. This mode can be useful if you are analyzing the structure and design of various polygons and attempting to understand the interaction of overlapping polygons. This mode is also useful when design changes are being made and the polygon is interfering with the process. An alternate approach to using outlines during design changes is to Shelve the polygons, where they are retained in the PCB file but are removed from view.
In Altium NEXUS's PCB editor, the process of how you define any multi-sided polygonal object, such as a solid region, the board shape or a polygon, is the same. Solid objects are closed objects, so regardless of how far you are through the placement process, the software will show a line from the cursor back to the object's starting location. This line will become the solid object's last edge if you press Esc (or right-mouse click) to exit placement mode. The placement process is a process of defining the corner locations using the various corner modes available.
There are five different corner modes available during polygon placement: 45º, 45º arc, 90º, 90º arc, and Any Angle as shown below.
Tips on placing a polygon:
There are many situations during PCB design where you need to be able to predict where a future track segment or object edge must go without committing to place that object. To support this requirement, Altium NEXUS includes a feature called Look-Ahead. When Look-Ahead is enabled, the track/object edge currently attached to the cursor is not placed when you click; only the previous segment is placed. In other words, the last segment allows you to look ahead to where the future segment will be placed.
Press the 1 shortcut key during object placement to toggle Look-Ahead on or off. Note how the display changes to display each mode. In track placement, the segments to be placed with the next click are shown as hatched, and the Look-Ahead segment is shown as hollow or empty. In solid object placement, the edges to be placed with the next click are shown as solid white lines and the Look-Ahead edge is shown as a dashed white line.
The following images show how the display of track segment changes when the Look-Ahead feature is on and off.
The Look-Ahead feature also works during polygon pour placement. Press the 1 shortcut key during placement to toggle it on and off. The following images show the first corner placement of a polygon pour.
A polygon can be attached to a net. Select the required net in the Connect to Net drop-down in the Properties panel. The polygon pour will connect to each pad on this net that is found within the outline of the polygon. How the polygon connects to the pads is determined by the applicable Polygon Connect Style design rule. The clearance between the polygon and objects belonging to other nets is determined by the applicable Electrical Clearance design rule.
How the polygon treats objects on the same net, such as routing tracks, is determined by the option selected in the Pour Over drop-down:
When a polygon is poured, there can be regions (islands) of the polygon that are completely isolated from the connected net due to the presence of other tracks, pads, etc. To have the software detect and remove these isolated islands of copper, enable the Remove Dead Copper option.
Main article: Polygon Connect Style Design Rule
How the polygon connects to pads on the net to which it is attached is controlled by the applicable Plane » Polygon Connect Style design rule (Design » Rules).
Three connection options are available:
Like any object placed on a signal (copper) layer, the clearance of a polygon from objects that it is poured around is controlled by the applicable Electrical Clearance design rule.
It is common practice to have a larger clearance between a polygon and other net objects. To achieve this, a polygon-specific Electrical Clearance design rule can be defined. An example of this is shown in the image above. Remember that the Polygon Clearance rule must also have a higher Priority than any general clearance rule to have any effect.
There are a number of ways a polygon can be repoured.
To repour a polygon:
Confirm the changes in the Confirm dialog.
A Polygon Pour Cutout is essentially a negative copper region in which you are defining a void or hole in the polygon. To define a cutout in a polygon, select Place » Polygon Pour Cutout from the main menus then click to define the cutout shape. Once the cutout has been defined, the polygon must be repoured; it will then pour around the cutout definition. Remember that the cutout is actually a solid region object and it can be resized by clicking once to select it, then clicking and holding to drag an edge or a vertex. After resizing the cutout, the polygon must be repoured.
As well as defining areas of electrical copper on a board, polygons and solid regions are also used to define other polygonal-shaped design objects, such as a special symbol or a company logo. If an outline of the required shape has been defined in another design tool, such as AutoCAD, it can be exported as a DXF file then imported into Altium NEXUS. That outline can then be converted into a polygon or a solid region.
To convert a set of tracks to a polygon, select the track segments and then select Tools » Convert » Create Polygon from Selected Primitives from the menus.
Click and drag to move a selected polygon pour. Hold down the Shift key to select multiple polygon pours to move.
An existing polygon pour can be reshaped.
To modify the polygon shape:
The Place » Slice Polygon Pour command is used to slice a single polygon pour into two or more separate polygon pours. When you select the command, you are in slice mode (similar to track placement mode). Click to anchor a series of vertex points that define the slice line. When defining the slice, press Shift+Spacebar to cycle through the corner modes; press Tab to change the width; press the Spacebar to toggle between the Start and End corner modes and use the Backspace key to remove the last placed corner. Place the end of the slice beyond the edge of the polygon. When you have finished defining the slice, right-click or press Esc.
A confirmation dialog opens stating how many new polygons will be created. Click Yes to confirm that you want to rebuild the polygons.
During the design process, it is normal for changes to occur - components might be added or changed, routing may need to be updated, etc. To simplify the management of existing polygons during this process, they can be Shelved. This temporarily hides them from the editor but retains them in the PCB database.
Polygon pours can be used on non-copper layers. If a polygon pour is placed on a non-signal layer, it will not pour around existing objects because they are not assigned to a net.
Main article: Polygon Pour Manager
The Polygon Pour Manager dialog provides a high-level view of all polygons that currently exist in the PCB design space. The dialog also allows you to name/rename each polygon, set the pour order of polygons, perform repouring or shelving actions on selected polygons, and add/scope design rules for selected polygons.
Notes about the Polygon Pour Manager dialog:
For more information about polygon pours in your PCB, use the Board Information region of the Properties panel (accessed when no objects are selected in the design space) or list the properties of a polygon pour and its children. The number of polygons detected on the PCB is shown in the Primitives & Others region of the Board Information region. Keep in mind that this total reflects not only polygon pours but also internal planes and split planes. For a detailed listing of polygon properties, use the PCB List panel.
Main article: PCB List panel
The PCB List panel provides an alternate approach to view and edit all design objects that currently exist in the workspace. To open the PCB List panel, click Panels at the bottom right of the workspace then select PCB List from the menu. The PCB List panel presents data in a tabular, or spreadsheet-like format. By default, it will display all objects in the workspace. Use the controls at the top of the panel to filter the list. In the image below, you can see that the PCB List panel is set to Edit, all objects, and only Polygons. The properties of one or more polygons can be edited in the PCB List panel.
Power planes are special solid copper internal layers that are typically used to provide an electrically-stable ground or power reference throughout the PCB.
The PCB editor supports up to 16 internal power planes. You can assign a net to each of these layers or share a power plane between a number of nets by splitting it into two or more isolated areas. Pad and via connections to power planes are controlled by the Plane design rules. Power planes are created in the negative. Objects placed on the power plane layer become voids in the copper; the remaining regions will become solid copper.
Internal power planes are added to a PCB design through the Layer Stack Manager (Design » Layer Stack Manager). To add a new internal plane, highlight the existing layer that you want the internal layer created under then select Insert layer below » Plane. A new internal plane is added to the layer stack. Use the Layer Stack Manager mode of the Properties panel to define the properties of the selected internal plane layer.
To view an internal plane in the design space, including power types, you must first enable the display of the plane layer on the Layer & Colors tab in the View Configuration panel.
If necessary, select Tools » Split Planes » Rebuild Split Planes on Current Layer or Rebuild Split Planes on All Layers to recalculate and redraw planes. You may find displaying the pad holes layer and multilayer useful as well. Use the Shift+S shortcut keys to toggle various Single Layer Mode settings that help highlight objects of interest.
In 3D viewing mode (shortcut 3), you can see physical representations of all internal plane objects. In addition to viewing, the 3D environment enables you to travel through the board, making the inspection of internal planes very easy. If you click on an internal plane, the entire area within the pullback tracks is highlighted. You can also select internal planes and their contents to view using the Split Plane Editor mode available from the drop-down menu at the top of the PCB panel.
When a power plane is added, a set of pullback tracks are automatically created around the board shape to pull back the plane from the edge of the board. Pullback tracks cannot be edited on screen as their width is defined in the Layer Stack Manager. If the pullback value for an internal plane has been changed, these tracks will be regenerated automatically.
To 'blow out' sections of a plane, i.e. create copper-free regions, you can place lines, arcs or fills using the Place commands to build up the no-copper region.
Connections to pads and vias are displayed on a power plane according to the Plane design rules set in the PCB Rules and Constraints Editor dialog (Design » Rules). You can create additional rules for pads and vias that have a specific connection or non-connection requirements.
Through-hole pads and vias can be connected to a power plane by either a direct connection or a thermal relief connection. Thermal relief connections are used to thermally isolate the connected pin from the solid copper plane when the board is soldered. The design rules in the PCB editor allow you to define the thermal relief shape of each or all pads connecting to the power plane.
The Power Plane Connect Style design rule specifies the style of the connection from a component pin to a power plane. Three connection options are available
Special support is also provided for connecting SMD power pins to power plane layers. SMD pads on a net that is connected to a power plane are automatically tagged as connected to the appropriate plane. The auto-router completes the physical connection for these pads by placing a fanout, which is a short track and via that is a relief or direct connection to the plane layer.
When a net is assigned to a power plane, a small cross will appear at each pad on the net on the appropriate power plane layer. The cross is displayed as '+' for a relief connection and as an 'x' for a direct connection. As direct connected pads have solid copper to the pin, they show the plane color up to the pad hole.
Pads not connecting to the plane are isolated from it by a region of no copper. This region of no copper is specified in the Power Plane Clearance design rule as a radial expansion around the pad hole.
Like pads, vias automatically connect to an internal power plane layer of the same net name. The via will connect in accordance with the applicable Power Plane Connect Style design rule. If you do not want vias to connect to power planes, add a Power Plane Connect Style design rule with a connection style of No Connect and a scope query of IsVia.
Check with your fabricator for suitable dimensional properties for any thermal relief connections. Also, check that pads or vias that do no connect do not completely surround a connected pad as this may accidentally cause the connected pad to become isolated and disconnected. Ensure to not remove too much copper and that a balance is struck between maximum copper and affordable manufacture.
You can use queries in the Power Plane Connect Style design rules to further limit which pads or vias connect or not to a power plane. Pads can be targeted by the designator's name or physical properties, such as the pad size. Since vias have no designators, they must be targeted by physical properties, such as the via diameter.
To disconnect, for example, only pads with a specific designator name starting with U7, you could use the (
ObjectKind = 'Pad') and (
Name Like 'U7-*') query to set the scope for a Power Plane Connect Style design rule. The connection style would be set to No Connect. Another query such as (
ObjectKind = 'Pad') and (
HoleSize = 25) would target only those pads with a hole size of 25mils.
When working with vias that you do not want to connect, you could modify vias to contain a special property to uniquely identify them, such as a different via diameter then scope a new Power Plane Connect Style design rule with a No Connect connection style to match only those vias. The query (
ObjectKind = 'Via') And (
ViaDiameter = '24') could be used to target vias with a diameter of 24mil, for example. The query
IsVia could be used to target just vias that are attached to the net VCC.
Alternatively, if you cannot select vias using the methods above, you can convert them to free pads then use pad names to set the scope. To do this, select the vias you do not want to connect, convert them to free pads (Tools » Convert » Convert Selected Vias to Free Pads) and assign the same Designator name to them all, e.g.,
NoPlaneConnect. Then add a new Power Plane Connect Style design rule and specify the scope (
ObjectKind = 'Pad') and (
Name = 'Free‑NoPlaneConnect') for the rule. Also, select No Connect as the Connect Style. All free pads named
NoPlaneConnect will be disconnected from all of the power plane layers.
To remove an internal plane, right-click on the layer in the Layer Stack Manager then choose Delete layer from the context menu. A confirmation dialog opens warning that all primitives on the layer will be removed with the layer deletion. Click Yes to confirm.
A split plane is an enclosed region on an internal plane that divides the plane into separate electrically isolated areas. Each region is defined by placing boundary lines to encompass all the pins on that net. Each area is then assigned to a different net that creates two or more split planes on one internal power plane layer.
Power planes can be split into any number of separate regions. This splitting process is like cutting or slicing the plane into sections where the width of the line you place defines the separation distance. Power planes are constructed in the negative, so these special boundary lines become a strip of no copper, hence, creating the separation between this net and the adjacent net(s) on the plane.
Typically, the net with the greatest number of pads is first assigned to the internal plane, then regions are defined (split off) for the other nets that you want to connect via this plane. Any pads that cannot be encompassed in the split plane region continue to display a connection line, indicating that they must be connected on a signal layer.
Split power planes are fully supported by the Design Rule Checker. However, they are not recognized by Signal Integrity as the power plane is assumed to be a continuous copper layer in Signal Integrity. Netlist extraction in the CAM Editor does not support Altium NEXUS mode split planes because it is unable to define the polyline that describes each region.
Splits within splits (nested splits or islands) are supported so you do not need to wrap an outer split around the inner split. If you want to further divide a split plane, you can continue to add objects on the power plane layer inside an existing split plane to create other electrically-isolated regions.
When you define a split area in a power plane, it can sometimes be difficult to see all the pads that the split area needs to encompass. To make the pads for the net that you want to connect to the split plane more visible, the following techniques are suggested before you start.
InNet('B')in the PCB List panel to show the nets, e.g., some with thermal relief and some without, to distinguish between the pads to be included in a new split plane.
In Altium NEXUS, you can place any configuration of lines, arcs, tracks, and fills across an internal power plane to define a split plane. As soon as these isolate a portion of the plane from the rest, a new split plane is created. A net is then associated with the new split plane. The easiest way to define split planes is to use the Place » Line command then draw the boundary of the split plane on the power plane.
This creates a line in the artwork to leave off copper which, in turn, splits the planes. The line width becomes the separation width. When you right-click to exit line placement mode, the plane is analyzed and the independent split region is created. To change the separation width between the split plane and the internal power plane during line placement, press Tab to open the Line Constraints dialog and change the Line Width value.
To divide a power plane into two split planes, you can draw a line straight across the board from pullback track to pullback track. As long as the lines connect to the pullback tracks, they will form an isolated area and, therefore, create the polygon type object that identifies the split plane. Make sure the lines connect; the cursor changes to a large circle in a cross when lines connect.
You can create an enclosed shape out of the lines, arcs, and fills to define an unusually-shaped split plane. You also can use existing lines, arcs, fills, or tracks on the internal layer to form part of the boundary. As long as they connect to form an enclosed area, a split plane is formed.
It is recommended if you use arcs to split the plane, you place a short track segment between the arc segments. Note that using a fill (Place » Fill) will not create a split plane; it will only create a void area. You could use fills to create the outside edges of the split plane by placing them instead of lines, for example.
If you place tracks instead of lines using the Place » Interactive Routing command, make sure the tracks are set to No Net and the split plane is associated with the appropriate net name instead.
To check if each split region is correctly defined, click once on a split; if it is a closed region, only that area will highlight.
If the area highlights, double-click to open the Split Plane dialog to check or set the net assignment. Select the split plane's net name from the drop-down list in the dialog.
Traditionally, a PCB power plane is designed as a negative, that is, the objects placed on a power plane layer become voids in the copper when the board is fabricated. This approach is used because it is more efficient to generate the output data this way, as the bulk of a plane layer is normally copper; voids in the copper are only needed in specific locations such as around non-connected pads, or as separation voids when the plane is divided into different voltage regions.
As part of improving support for more complex power plane design, it is now possible to define power planes as polygons. Working in this mode does not affect the approach to designing a power plane; they are still defined in the negative - so placing an object creates a void in the copper, and they continue to be split into separate regions by placing a split line.
The advantage of using polygons is that copper islands, narrow necks and dead copper can automatically be detected and removed.
Notes about the Polygons on Plane mode:
Since power plane layers are constructed in the negative, a track placed on a power plane layer creates a void in the copper, and therefore, no connection is made. Due to this, you cannot use a single track on a plane layer to route a net. If you want to route a net on a power plane layer, you have to create a very thin island of copper that is the size of the track you want to use. By creating a boundary of lines around the area that will act like a track (Place » Line), you create a split plane that can then be assigned to the net required.
Alternatively, if there are a number of connections to be routed on the same layer as the plane, it is probably more efficient to use a signal layer to route the connections and then use a polygon plane (copper pour) to create the power plane.
You can review and edit split planes in the PCB panel by selecting the Split Plane Editor from the drop-down at the top of the panel. Click on the net/layer to display split planes and their nets on that power plane.
Click on a split plane in the Split Plane(s) and Net(s) region to display the pads and vias on that split plane. Double-click on a split plane name to open the Split Plane dialog in which you can edit the net associated with the split plane or right-click in the design space to select an option from the pop-up menu.
In 3D viewing mode (shortcut 3), you can see physical representations of all internal plane objects. The 3D environment enables you to move easily through the board, making true plane inspection very easy. Recalculate and redraw internal planes after editing by selecting Tools » Split Planes » Rebuild Split Planes on Current Layer or Rebuild Split Planes on All Layers.
Since a split is formed when a region on a plane is isolated, removing any object that forms the split boundary will remove that split. Therefore, to delete split planes, delete the bounding primitives, e.g. the lines or other primitives creating the outline of the split plane. Remember that pullback tracks can only be deleted by removing the internal plane from the layer stack.
You can check and report on split planes during Batch design rule checking (DRC) for the following rules:
These options are available in the DRC Report Options in the Design Ruler Checker dialog, which is accessed by selecting Tools » Design Rule Check from the main menus. Enable the desired options to have them checked and reported during Batch DRC.
When the report is created, any breaches of these rules are displayed in the report. Click in the report to display the associated error in the PCB editor.
Broken planes occur when an area of the plane that has connectivity to the net becomes electrically disconnected from the rest of the plane. An example where this might occur is a connector that is placed across a split plane but not connected to it. The voids around the pins join to completely cut through the plane copper, effectively breaking it into two parts.
Dead copper refers to sections of copper that have no connectivity to the net and that also become electrically disconnected from the original plane. An example where this might occur is a connector (not connected to the plane) with closely-spaced pins in which the voids around the pins join to isolate areas of plane copper from the rest of the plane.
Thermals are connections to the plane with thermal relief 'cutouts' around them to reduce heat conductivity to the plane copper. Thermals can become 'starved' when the surface area of the copper spokes connecting it to the plane is reduced by void areas. This rule also checks the surface area for the thermal (not just the spokes) against any void areas that encroach into the thermal.