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Design for signal integrity during PCB layout with controlled impedance.
TOPICS IN THIS SOLUTION
The most powerful, modern and easy-to-use PCB design tool for professional use.
Altium Designer Impedance Formula Editor for Stripline
Printed Circuit Board layouts contain transmission lines. Transmission lines are electrically long traces unable to support rise and fall times for high-speed signals. Transmission lines carrying high-speed signals interfere with signal integrity. There are techniques available to manage interference due to high-speed signals on PCB traces. Whether it is characteristic impedance or differential impedance, you’ll need to manage signal integrity.
Impedance control is applied to microstrip and stripline transmission lines carrying high-speed signals. High-speed signals may travel as either single-ended or as differential pairs. Signals traveling along microstrip and stripline are analyzed to determine if traces must be considered transmission lines. Traces will need impedance control if twice its propagation delay along the trace length is greater than either the rise or fall time of the signal.
Reflections, ringing, and overshoot result from traces on the PCB without effective controlling impedance routing.. Analysis produces methods to mitigate impedance mismatches. Mismatches occur due to impedance discontinuities such as changes in trace width, lack of terminations, T-stubs or bifurcated traces, vias between routing layers, large power plane discontinuities, and connector transitions.
Analyze PCB placement of high-speed digital signal nets within the layout. Determine if twice its trace length is greater than either the rise or fall time of the signal it supports. Moving on to impedance control requires knowledge of substrate used to eventually manufacture the PCB. Using its dielectric constant along with distance from the signal to adjacent power planes results in matched impedance necessary to maintain signal integrity. Tuning for matched impedance occurs by adjusting trace width.
Establish dielectric constants and layer distances within Altium’s Layer Stack Manager
Determine placement of high-speed traces and which configuration to use for PCB layout and for controlled impedance routing. Knowing layout using microstrip or stripline configurations inform which impedance calculators apply for analysis. Consult PCB vendors for accurate numeric values when using calculators.
Use EDA software tools when laying out PCBs to first prevent reflections and ringing. Analyze and determine electrically long traces for treatment with impedance matching or termination circuits. Impedance calculators establish trace widths and determine distance from power planes given substrate used to fabricate the PCB. Substrate establishes dielectric constant that adds to overall impedance of the trace.
Minimize overshoot and ringing with controlled impedance in backdrilled vias
EDA tools contain impedance calculators when laying down the PCB for application in mitigating effects of high-speed traces. Using propagation delay with known trace length establishes if application of impedance control is necessary. Techniques to locate sensitive components minimizes RF currents that build across uncontrolled impedances. Keeping clock signals short and away from PCB edges can be set within the PCB design tool. Careful placement of vias prevents addition of unwanted impedance, along with good grounding of noisy component leads.
Altium Designer has tools for analyzing high speed design to design controlled impedance traces within PCB layout. Measure length of high-speed traces to determine if edge rates wash out the signal by beating the rise or fall time of the carrying signal. Use simulation tools to analyze termination techniques for refinement in tuning for signal integrity before sending the board for fabrication. Use the PCB layout environment to ensure power planes are continuous.
Establish trace widths for impedance control from schematic directives
Altium’s PCB layout environment provides tools for measuring traces, for defining layer stacks, and determining return paths of high-speed signals. Traces are visualized in the layer stack manager and both microstrip and stripline may be evaluated in the impedance calculator to ensure trace thickness and width is appropriate for the material’s dielectric. Distance between signal and power planes may be adjusted as well.
Altium Designer has all the tools you need to evaluate and establish impedance along traces in PCB layout. Using measurement tools allows evaluation of signals along microstrip or stripline for transmission line effects. Layer views may be consulted for discontinuities in power planes that may disrupt signal flow. Defining layers for high-speed placement of microstrip and stripline occurs in the Layer Stack Manager. Definition of drill profiles for vias is accomplished and analyzed for overall impedance contribution to the net. The Impedance Formula Calculator is accessed from the Layer Stack Manager, the location for dielectric constants, trace widths, and distance between planes. Selected impedances may be evaluated using Altium’s integrated simulation tools which allow real-time adjustment of net parameters to establish signal integrity before going into fabrication. Altium Designer has impedance control tools available within a unified environment to address impedance locations for fine tuning.