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Parent category: Violations Associated with Nets
Default report mode:
This violation occurs when a net in the design has been detected to have multiple names associated with it.
If compiler errors and warnings are enabled for display on the schematic (enabled on the Schematic - Compiler page of the Preferences dialog), an offending object will display a colored squiggle beneath it. Hovering over the object will display a pop-up hint that summarizes the violation. A notification is also displayed in the Messages panel in the following format:
Nets <
Identifier> has multiple names (<
NameList>)
where:
Wire NetName
(e.g., Wire DTSA)Bus Slice NetName
(e.g., Bus Slice A[0..7])Element[n]: NetPrefix
(e.g., Element[0]: A)This violation can be resolved by ensuring that the names of all net identifiers associated with a particular net are the same. However, in many cases, it is beneficial to use different names for a particular net - for example, when that net is present on different branches of a hierarchical design and different names better reflect the conducted signal in those branches. Similarly, you may want to describe the sheet entry of a particular sheet symbol using a different name to that of the net label attached to the incoming/outgoing wire or bus.
To freely use multiple names with nets in your design and prevent related violation messages appearing in the Messages panel, set the Report Mode for this violation type to No Report
on the Error Reporting tab of the Options for Project dialog (Project » Project Options).
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