Altium Designer Documentation

Panelization - Embedded Board Array Enhancements

Modified by Jason Howie on Dec 14, 2017

Altium Designer delivers strong support for PCB panelization through its embedded board array feature. This feature makes it easy to define a panel, of the same or different board designs. And because the source boards in the panel are linked rather than copied into the embedded array, design changes made on a source board are immediately reflected in the panel. A panel is created by opening a new PCB file, then placing an Embedded Board Array.


An embedded board array where the source PCB is laid out in a step and turn pattern.

Panelization Enhancments

Simplified Embedded Board Array Spacing

  • Embedded Board Array spacing options are improved, making it much easier to define the array. Along with corner-to-corner spacing, edge-to-edge spacing specification has been added.


Spacing options simplify the process of organizing the panel.

Move Array by Anchor

  • Graphical move-drag of an Embedded Board Array can now be performed with the board array's location used as the anchor point to the cursor.

Verification of Layer Stack Compatibility

  • On placement of an Embedded Board Array, you are now notified of layer stack discrepancies.


Layer stack compatibility is checked as the source board is added, and reported in the dialog.

Automatic Layer Stack Updating

As well as checking for layer stack compatibility, the software will also attempt to resolve layer stack compatibility issues.

The automatic layer stack synchronization process will attempt to:

  • Ensure that all required child board layer stack ordered layers exist in the parent board (the PCB file containing the embedded board array).
  • Modify the parent board layer stack in an attempt to acheive synchronization - a child board is never modified.
  • Make only additive or layer type modifications to the parent board, layers are never removed.

Create Tool Paths from Cutouts

Panelization Updates

Correct Display of Selections

  • Objects selected in a child design of an Embedded Board Array no longer affect the display of the parent design.

Accurate 3D View

  • When in 3D PCB view some tracks of the embedded board could be displayed on the wrong layer, this has been fixed.
  • The 3D Bodies of an Embedded Board Array that is mirrored, now display properly in 3D Layout Mode.

Correct Behavior of Origin

  • The Link Location to Embedded Board Origin option now behaves more predictably on placement of an Embedded Board Array.

Correct Output Generation

  • Resolved an issue with STEP file export where an empty PCB was exported, instead of the embedded board array.
  • A BOM report for a panelized PCB now outputs an error message to the BOM file.
  • Embedded Board Arrays that contain SMD pads and are also Mirrored now produce valid ODB++ Fabrication output.
  • Multi-line Strings that use Stroke font and are placed in child designs of Embedded Board Arrays now produce correct Gerber output.

 

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