Altium Designer Documentation

Pin-Package Delay Support

Modified by Jason Howie on Dec 14, 2017
This documentation page references Altium Vault, which is no longer a supported product. Altium Vault and its component management features have migrated to Altium Concord Pro.
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In every high speed design over 500 MHz, the connection medium, or bond wire to the die, introduces a delay to the signal. This in-device delay is referred to as the pin-package delay. Even if two devices are fully pin compatible from a design and PCB standpoint, package flight times will be different across different devices, so they will need to be accounted for. Flight time information can be found within the IBIS 6 document for the device. The Package Pins information should be considered during the I/O planning stage, or after synthesis for an FPGA.

All device manufacturers should be able to supply the package delays, which will be specified either as a picosecond delay, or as a length. Altium uses the length method, as this can easily be added to the trace length to equalize the routed traces in the design.

The pin package length is included in the the overall Signal Length, which can be examined in various modes of the PCB panel, including the Nets mode and the xSignals mode.

Including the Delay in the Schematic

Pin package lengths can be defined as an attribute of the schematic component pin, in the Pin/Pkg Length field of the Pin Properties dialog. The software will default to use the Units of the underlying document, enter the required units along with the value.


Enter the pin-package length, with the units.

Use the SCHList panel to copy/paste multiple Pin/Pkg Lengths from a datasheet into a set of component pins.

Defining the Delay in the PCB Editor

The length value is transfered to PCB layout, where it becomes the Pin/Pkg Length of the footprint pad - as seen in the Pad dialog.


The length is transferred from the schematic to the PCB, it can also be defined in the PCB.

Examining the Pin/Pkg Length in the PCB Panel

The Pin/Pkg Length is automatically included in the Signal Length calculations, which are dispayed in various modes of the PCB panel. Set the panel to Nets mode to examine (or edit) the value of the Pin/Pkg Length for the pins in the chosen net. Note how the Routed Length column reflects the length of the routing, and the Signal Length column reflects the length of the routing plus any Pin/Pkg Lengths in that net.


The Pin/Pkg Length and its impact on the Signal Length is shown in the Nets mode of the PCB panel.

How the Length is Included in xSignals

The Pin/Pkg length is automatically included in the overall xSignal length, when:

  • That signal is part of an xSignal definition
  • That pad is not connected in a fly-by routing pattern (there is only one trace connected to that pad)

Pads that are connected in a fly-by routing pattern (with an entry and an exit point) are excluded from the length calculation.

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