High Speed - Parallel Segment

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Rule category: High Speed

Rule classification: Binary


This rule specifies the distance two track segments can run in parallel, for a given separation.

  • This rule incorporates a Layer Checking option as a constraint. Because of this, it is not possible to define a layer-based rule scope, for example to only test for parallel segments OnTopLayer. All other rule scoping options are supported, such as InNet or InNetClass.
  • Routed Differential Pair nets are excluded from checking by this rule.
All design rules are created and managed within the PCB Rules and Constraints Editor dialog. For a high-level view of working with the design rules system, see Defining, Scoping & Managing PCB Design Rules.


Default constraints for the Parallel Segment rule.Default constraints for the Parallel Segment rule.

  • Layer Checking - specifies where the two track segments to be checked should reside:
    • Same Layer - the track segments for the targeted nets are both on the same layer
    • Adjacent Layers - the track segments for the targeted nets are on adjacent layers.
  • For a parallel gap of - specifies the parallel gap that should exist between two track segments before they can be considered for test. Parallel track segments with a gap of this value or less will be tested.
  • The parallel limit is - specifies the maximum permissible parallel length of two track segments (on different nets), when the parallel gap constraint is observed over the entire length.

How Duplicate Rule Contentions are Resolved

Duplicate rules do not create contentions for this rule.

Rule Application

Online DRC and Batch DRC.


This rule detects parallel track segments that are within the parallel gap setting, then adds all segment lengths that are in those nets. When the sum of these segment lengths exceeds the parallel limit, a DRC violation is flagged. A simple example is shown below.

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