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Parent page: PCB Design Objects
A via is a primitive design object. It is used to form a vertical electrical connection between two or more electrical layers of a PCB. Vias are a three-dimensional object, having a barrel-shaped body in the Z-plane (vertical) with a flat ring on each (horizontal) copper layer. The barrel-shaped body of the via is formed when the board is drilled and through-plated during fabrication. In the X and Y planes, vias are circular, like round pads. The key difference between a via and a pad is that as well as being able to span all layers of the board (top to bottom), a via can also span from a surface layer to an internal layer or between two internal layers.
Vias are available for placement in both the PCB editor and the PCB Library editors in the following ways:
After launching the command, the cursor will change to a crosshair and you will enter via placement mode:
When a net is being interactively routed, you can cycle through the available signal layers by pressing the * key on the numeric keypad. Alternatively, use the Ctrl+Shift+Roll Mouse Wheel combination to move through the signal layers. When this is done, the software will automatically place a via in accordance with the applicable Routing Via Style design rule. Note that multiple Via Style design rules can be defined allowing different via sizes to be assigned to different nets.
When a via is placed in free space, it is not possible for the software to apply a routing style design rule during placement. In this situation the default via will be placed.
Vias cannot have their properties modified graphically other than their location.
The following methods of non-graphical editing are available.
Properties page: Via Properties
This method of editing uses the associated Via dialog and Properties panel to modify the properties of a Via object.
During placement, the Via mode of the Properties panel can be accessed by pressing the Tab key. Once the Via is placed, all options appear.
After placement, the Via dialog can be accessed by:
After placement, the Via mode of the Properties panel can be accessed in one of the following ways:
The Properties panel supports editing multiple objects, where the property settings that are identical in all currently selected objects may be modified. When multiples of the same object type are selected manually, via the Find Similar Objects dialog or through a Filter or List panel, a Properties panel field entry that is not shown as an asterisk (
*) may be edited for all selected objects.
A List panel allows you to display design objects from one or more documents in tabular format, enabling quick inspection and modification of object attributes. When used in conjunction with the Filter panel, it enables the display of just those objects falling under the scope of the active filter – allowing you to target and edit multiple design objects with greater accuracy and efficiency.
Vias are a key element of routing. This section provides valuable information on working with vias.
The default is for a via to span from the Top Layer through to the Bottom Layer; this is known as a thru-hole via. In a multi-layer board, a via can also span other layers. The possible layers that a via can span depends on the fabrication technology used to fabricate the board. The traditional approach to manufacture a multi-layer board is to make it a set of thin double-sided boards, which are then sandwiched together under heat and pressure to form a multi-layer board.
The image below shows a six layer board, as shown by the layer names on the left side of the image. This board would first be fabricated as three double-sided boards (Top-Plane1, Mid1-Mid2, Plane2-Bottom) as indicated by the hatched core layers.
These double-sided boards can have via sites drilled, if required, forming what is known as blind vias (via number 1) when the via spans from a surface layer to an inner layer; and buried vias, when a via spans from one internal layer to another internal layer (via number 2). After the layers are pressed together into a single multi-layer board, thru-hole vias are drilled (via number 3).
Another type of multi-layer board fabrication technology is called Build-up technology, where layers are added one after the other, often over a double-sided or traditional multi-layer board. When this technology is used, vias can be drilled with a laser after each layer is added during the build-up process, resulting in a large number of possible layer-pairs that can be spanned. The layer-pairs used for each via are defined by the Start Layer and End Layer settings for the via.
The definition of a microvia (or build-up via) (µVia), according to IPC-2226A, is a blind structure with a maximum aspect ratio of 1:1 when measured in accordance with the image below, terminating on or penetrating a Target Land, with a total depth (X) of no more than 0.25 mm [9.84 mil], measured from the structure's Capture Land foil to the Target Land.
µVias (microvias) are used as the interconnects between layers in high density interconnect (HDI) designs, to accommodate the high input/output (I/O) density of advanced component packages and board designs. Sequential build-up (SBU) technology is used to fabricate HDI boards. The HDI layers are usually built up onto a traditionally manufactured double-sided core board or a multilayer PCB. As each HDI layer is built on to each side of the traditional PCB, µVias can be formed using: laser drilling, via formation, via metallization, and via filling. Because the hole is laser drilled, it has a cone shape.
If a connection required a path through multiple layers, the original approach was to stagger a series of µVias using a step-like pattern. Improvements in technology and processes now allow µVias to be stacked directly on top of each other.
Buried µVias are required to be filled, while blind µVias on the external layers do not require filling. Stacked µVias are usually filled with electroplated copper to make electrical interconnections between the multiple HDI layers and provide structural support for the outer level(s) of the µVia.
An opening in the solder mask is automatically created by the software in the same shape as the via. This opening can be larger (a positive expansion value) or smaller (a negative expansion value) than the via itself as defined by the Mask Expansion settings. The expansion is measured from the outer edge of the copper. Solder mask openings over a via can be slightly larger than the via copper area, smaller to cover the copper area but not the drill hole, or they can be completely closed, which is called tented. The default is for the via to use the Expansion value from the Solder Mask Expansion rule. This can be overridden and manual values defined directly in the Properties panel if required.
The term tenting means to close off. If a tenting option is enabled, then the settings in the applicable Solder Mask Expansion design rule will be overridden resulting in no opening in the solder mask on that solder mask layer for this via.
Use the Testpoint region to define this via as a testpoint for Fabrication and/or Assembly. A testpoint is a location where a test probe can make contact with the PCB to check for the correct function of the board. Any pad or via can be nominated as a testpoint.
There are a number of display features available to help you work with vias.
Via colors are configured in the View Configuration panel. The copper ring of the via is shown in the current Multi-Layer setting in the Layers section. The via hole color is shown in the Via Holes setting in the System Colors section. You can also disable the display of holes by toggling the for the desired setting(s).
The default presentation of layers in the PCB editor is to always show the Multi-Layer as the topmost layer. That can make it difficult to accurately view the contents of the solder mask layers especially when a pad or via uses a negative mask expansion since the solder mask layer contents will disappear under the multi-layer object. You can change this by changing the layer drawing order on the PCB Editor – Display page of the Preferences dialog. Set the current layer to be drawn as the top-most layer.
By changing the layer drawing order to show the Current Layer on top, when you make the Top Solder the current layer, the mask openings are accurately presented as shown in the image below. The green arrows show the size of the solder mask opening for a via on the left, a pad where the mask opening is contracted in the center, and a pad where the opening is expanded on the right.
To display the via net name, enable the Via Nets option in the Additional Options region on the View Options tab of the View Configuration panel.
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