The definition of the PCB layer stack is a critical element of successful printed circuit board design. No longer just a series of simple copper connections that transfer electrical energy, the routing of many modern PCBs is designed as a series of circuit elements, or transmission lines.
Achieving a successful, high-speed PCB design is a process of balancing the material selection and layer stackup and assignment, against the routing dimensions and clearances, to achieve suitable single-sided and differential routing impedances.
There are also numerous other design considerations that come into play when designing a modern, high-speed PCB, including: layer-pairing, careful via design, possible back drilling requirements, rigid/flex requirements, copper balancing, layer stack symmetry and material compliance.
The new Layer Stack Manager sets out to resolve all of these requirements, bringing together all of the layer-specific design requirements, into a single editor. The Layer Stack Manager opens in a document view, in the same way as a schematic sheet, the PCB, and other document types do.
The Layer Stack Manager opens in a separate View tab.
Working in the Layer Stack Manager
Select Design » Layer Stack Manager from the PCB editor menus to open the Layer Stack Manager View.
As a standard View, the Layer Stack Manager (LSM) can be left open while the board is being worked on, allowing you to switch back and forth between the board and the LSM. All of the standard View behaviors, such as splitting the screen or opening on a separate monitor, are supported. Note that a Save action must be performed in the Layer Stack Manager before edits are reflected in the PCB.
Summary of Features
The fabricated layers are shown in the grid region of the Layer Stack Manager, layer properties can be edited when the Stackup tab is selected at the bottom of the Layer Stack Manager.
The properties of the currently selected layer can be edited directly in the grid, or in the Properties panel. Click the button to display the Properties panel. More in the Layer Stackup section.
Column visibility is configured in the Select columns dialog. To open the dialog, right-click on an existing column heading and choose Select columns from the context menu. User-defined columns can be created.
The Layer Stack Manager has multiple modes, including: Stackup, Impedance and Via Types. Select the current mode using the Tabs at the bottom of the Layer Stack Manager View. Two additional modes, Printed Electronics and Back Drills, are available when those features are enabled.
The Via Types tab defines which layers are allowed to be connected by a via in the Z-plane (the allowed via spanning). The properties of placed vias (diameter, hole size, etc) are then defined either by design rules, or manually. More in the Via Types section.
The selected Cell in the grid can be edited: as a text field; using the included dropdown menu; or using the ellipsis control () located in the Material cell.
The Copy and Paste commands are cell-level commands, use this to copy/paste individual properties between layers.
Printed Electronics, Back Drills and Rigid/Flex design features are enabled via button or the Tools » Features sub-menu commands. More details about these features below.
Right-click in the layer grid or use the Edit » Add Layer commands to add layers. Adding a copper layer will also add a dielectric layer, when an existing adjacent layer is also a copper layer.
If the Stack Symmetry option is enabled (Properties panel, Board section), layers are added in matching pairs, centered around the mid-dielectric layer.
The layer Material can either be: typed in to the selected Material cell; or selected in the Select Material dialog, click the ellipsis control () to open it.
Additional copper plating can added to a copper layer, use the Layer sub-menu and add a Copper plating layer.
The Edit » Layer Up/Layer Down commands move the selected layer up or down, within the layers of the same type.
The Board section of the Properties panel includes options to enforce Stack Symmetry and Library Compliance, more on these below.
The Board section of the Properties panel also displays a summary of the currently selected stack (or substack for a multi-stack rigid/flex design).
The properties of the currently selected layer are displayed in the Layer section of the Properties panel, the set of fields changes to suit the selected layer-type.
A key ingredient of high-speed PCB design is to carefully control the impedance of the signal routing paths - an approach that is referred to as controlled impedance routing. This contributes greatly toward maintaining the integrity of the signals, and also reduces the potential of electromagnetic radiation.
Signal impedance is a function of: the properties of the conductive and dielectric materials; the structure and dimensions of the conductors and their separation from signal return planes; and the signal properties.
The impedance calculation is shown for the selected Impedance Profile, S50, on the selected layer, L1.
The differential impedance calculation is shown for the selected Impedance Profile, D90, on the selected layer, L3.
Click on the Impedance Tab at the bottom of the Layer Stack Manager to configure the Impedance Profile requirements. The required Impedance Profile can then be selected in the Routing Width or Differential Pairs Routing design rules.
Click the to add a new Impedance Profile, where the Type, Target Impedance and Target Tolerance are defined. The currently selected Impedance Profile information is displayed at the top of the Properties panel, set the Type, Target Impedance and the Target Tolerance.
For each signal layer in the layer stack, a layer is also displayed in the Impedance Profile region on the right. Use the layer checkbox to enable the current Impedance Profile for that layer.
When a layer has an Impedance Profile assigned, edit the reference layers in the Top Ref and Bottom Ref columns. Note that reference layer(s) can be of Type Plane or Signal.
When a layer that has an Impedance Profile enabled is selected, all layers in the layer stack are faded, except those being used to calculate the impedance on the selected signal layer.
The calculators support forward and reverse impedance calculations, enter the Target Impedance and the Trace Width will change automatically, or enter the Trace Width and the Target Impedance will change automatically.
For a differential impedance calculation, lock either the Trace Width or Trace Gap by clicking the appropriate button, the unlocked variable will then be calculated as the Target Impedance value is changed. Alternatively, edit the unlocked variable to change the Target Impedance.
Etch Factor = Thickness/[(W1-W2)/2]
The impedance calculator supports multiple adjacent dielectric layers, if they have the same dielectric properties. Adjacent dielectric layers that have different properties are currently not supported.
The differential impedance calculator supports an asymmetric stripline structure, as shown in the lower of the two images above.
Coplanar lines are currently not supported.
All calculations use a frequency of 2 GHz.
Vias provide signal connectivity between the layers, in the Z-plane. Traditionally via holes were drilled after the layers were fabricated, so they had to pass from one side of the board to the other.
By drilling vias at certain points during the fabrication process, it was possible to create vias that only spanned two adjacent signal layers. These are referred to as blind (from a surface in) and buried (completely internal) vias.
Improvements in fabrication techniques and the introduction of laser drilling saw the introduction of very small (<10mil) vias, formed from a surface layer to the next signal layer down. These are referred to as µVias. By creating µVias during the fabrication process, it is now possible to form µVias that deliver seemless layer-to-layer signal transitions.
All of these Via Types are supported.
The Via Types tab is used to define the allowed Z-plane layer-spanning requirements of the via(s) used in the design.
The diameter and hole size (X&Y properties) of the vias placed in the design continue to be controlled by: the default preferences if the via is placed manually; or the applicable Routing Style design rule if the via is placed during interactive routing.
The Layer Stack for a new board includes a single, thruhole via span definition in the Via Types tab of the Layer Stack Manager. For a two layer board the default via is named Thru 1:2, the naming reflecting the via type, and the First and Last layers that the via spans. The default thruhole span cannot be deleted.
Click the button to add an additional Via Type, this new definition will have a name of <Type> <FirstLayer>:<LastLayer> (eg, Thru 1:2). Define the layers that the via spans in the Properties panel.
The software will automatically detect the type based on the layers that have been chosen, and name it accordingly.
If a µVia is required, enable the µVia checkbox. This option will be available when the via spans adjacent layers, or adjacent +1 (this is referred to as a Skip via). Refer to the µVia page to learn more.
If the Layer Stack has the Stack Symmetry option enabled, the Mirror option will become available for the selected Via Properties. When this is enabled, a mirror of the current via, spanning the symmetrical layers in the layer stack, is created.
Placed vias now include a Name property dropdown, which lists all of the Via Types defined in the Layer Stack Manager. All vias used in the board must be one of the Via Types defined in the Layer Stack Manager.
During a layer change while interactive routing:
The Properties panel will display the applicable Via Type ( show me).
If multiple Via Types are available to suit the layers being spanned, press the 6 shortcut to cycle through the available Via Types.
The proposed Via Type is detailed on the Status bar ( show me).
In a high speed design, when the barrel of a via extends beyond the signal layer(s) that the signal is routed on, signal reflections can occur. This leads to signal degradation and signal integrity issues. One approach used to resolve this is to drill out the unused via barrels using controlled depth drilling, a technique referred to as back drilling.
Back Drills are enabled in the Tools » Features sub-menu. Back drill properties are then configured in the Back Drills tab, which will appear after the Via Types tab.
The Back Drills tab is used to define the layer-spans that are required to be back drilled, when there is a pad or via stub present. These settings are used in conjunction with the Max Via Stub Length design rule, where the maximum stub length and the drill oversize amount are specified. In the design rule, the Where the Object Matches setting can also be used to restrict the scope of the rule, for example to target specific nets that are to be tested for stubs that need to be back drilled.
Click the button to add a new back drill definition. The definition will be named according to the First layer and Last layer selected in the Drill Properties section of the Properties panel, for example BD 1:3. First layer defines the first layer to be drilled, Last layer defines the layer that should be drilled up to, but not actually included in the drilling.
If the Substack Properties has the Stack Symmetry option enabled, the Mirror option will become available in the Drill Properties section of the panel. When this is enabled, a mirror of the current Back Drill is created, for example BD 1:3 | 6:4.
A PCB can be fabricated to be rigid, flexible, or a mixture of rigid sections and flexible sections. To achieve this multiple layer stacks are defined, one for each region of the board that has different layer stack requirements.
When the Rigid/Flex option has been enabled the Substack Selection button appears, click to select and configure a substack. Hover the cursor over the image to see the Flex substack.
Additional layer stacks are defined by selecting the Tools » Features » Rigid/Flex option, or using the button.
When the Rigid/Flex option is enabled, a Substack Selection button appears at the top of the Layer Stack Manager. In the image above the button is being used to toggle between the Rigid substack and the Flex substack.
Click the button to add a new substack. The new substack will be selected in the Substack Selection button:
Edit the Stack Name and set the Is Flex setting as required in the Properties panel. Naming the substack helps when the X/Y stackup region is being assigned a layer substack.
Using the layer enable checkboxes, enable only those layers required in that substack.
To add a bikini coverlay to a flex substack:
Use the Substack Selection button to select the substack, then right-click in the layer grid and select Insert layer above / below » Bikini Coverlay from the context menu.
The coverlay is automatically added above or below the outer copper layers. Use the layer checkboxes to enable the coverlay layers in the Flex substack.
To enter a coverlay expansion value, enable the Coverlay Expansion column. To do this, right-click in an existing column title and choose the Select columns command from the context menu. Coverlays are a calculated object that are generated when the Custom Coverlays option is enabled in the Board Region dialog, more on this below.
Once the Z-plane stackup requirements of each unique layer stackup region have been defined in the Layer Stack Manager, then the surface area that each stackup region occupies on the board surface can be defined by switching the workspace to Board Planning Mode (View menu), and splitting off each unique stackup region (Design » Define Split Line). Once the stackup regions have been defined, double-click on each region to open the Board Region dialog, where you can name that region, assign a layer substack and enable Custom Coverlays, if required (coverlays are displayed in Board Planning Mode). You can also manage and review the stackup regions in the Layer Stack Regions mode of the PCB panel.
An exciting evolution in the design and development of electronic products is the ability to print the electronic circuit directly onto a substrate, such as a plastic molding, that becomes a part of the product.
A number of techniques are being developed to "print" a circuit, including: laser deposition, 3D printing, and stamping. Using printed electronics, the humble rigid fiberglass printed circuit board substrate is no longer required. Instead the circuit is formed directly onto the product, the conductors ultimately following the shape and contours of the product's surface.
The layer stack is configured for printed electronics by selecting the Tools » Features » Printed Electronics option.
Traditional dielectric layers are not used in printed electronics, instead local dielectric patches are printed where routing must cross over. When the Printed Electronics option is enabled, all dielectric layers are removed from the layer stack currently displayed in the Layer Stack Manager.
Copper signal layers are referred to as conductive layers, dielectric layers are referred to as non-conductive layers.
Dielectric patches are defined by placing suitably shaped region objects on non-conductive layers.
Preferred layer stack materials can be pre-defined in the Materials Library. The library includes a variety of material definitions, and new definitions can be added.
In the Layer Stack Manager, select Tools » Material Library to open the Altium Material Library dialog, where existing materials can be reviewed, and new material definitions added.
To add a user-defined material, select the correct material type in the tree on the left, for example Foil, and the New button will become available. New material definitions will have their Source property set to User.
If user-specified materials have been defined they can be saved to a Material Library Database file, click the Save button to do this.
User-defined materials can be loaded from an external Material Library Database, click the Load button to do this.
To use a specific material as a layer in the layer stack, click the ellipsis control () for that layer, in the Materials cell of the layer stack grid. This will open the Select Material dialog, which restricts the library to only show materials suitable for the layer that the ellipsis control was clicked.
If the Library Compliance checkbox is enabled in the Layer Stack Manager, then for each layer that has been selected from the Material Library, the current layer properties are checked against the values of that material definition in the library. Any property that is not compliant is marked with an error flag. Re-select the material () to update the values to the Material Library settings.
Layer Stack Symmetry
If you require the board layer stack to be symmetrical, enable the Stack Symmetry checkbox in the Substack Properties section of the Properties panel. When this is done, the layer stack is immediately checked for symmetry around the central dielectric layer. If any pair of layers that are equidistant from the central dielectric reference layer are not identical, the Stack is not symmetric dialog opens.
The upper section of the dialog details all detected conflicts in layer stack symmetry.
The following options are available to achieve layer stack symmetry:
Mirror top half down - the settings of each of the layers above the central dielectric layer are copied down to the symmetrical partner-layer.
Mirror bottom half up - the settings of each of the layers below the central dielectric layer are copied up to the symmetrical partner-layer.
Mirror whole stack down - an additional dielectric layer is inserted after the last copper layer, then all of the signal and dielectric layers are replicated and mirrored below this new dielectric layer.
Mirror whole stack up - an additional dielectric layer is inserted before the first copper layer, then all of the signal and dielectric layers are replicated and mirrored above this new dielectric layer.
When Stack Symmetry is enabled:
An edit action applied to a layer property is automatically applied to the symmetrical partner-layer.
Adding layers will automatically add matching symmetrical partner-layers.
Use the Stack Symmetry option as a quick way of defining a symmetric board - define half of the layer stack, enable the Stack Symmetry option, then use one of the mirror whole stack options to replicate that set of layers.
An excellent way to verify the layer stack is visualize it in 3D.
Select Tools » Layerstack Visualizer in the Layer Stack Manager to open the Layerstack Visualizer.
Use the controls to configure the presentation of the layer stack.
Right-click and drag to reorient the board in the visualizer.
Left click on the image, then Ctrl+C to copy the image to the Windows clipboard.
Working with Layerstack Templates
Use the Load Template and Save Template commands in the File menu to load a template stackup, or save the current stackup as a template.