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The following sections provide a running summary of the release notes for updates to the PDN Analyzer powered by CST® extension.
|22509||Improved current density uniformity at shape boundaries.|
|24918||Enabled docking of the PDN Analyzer panel by default.|
|24934||Reduced the default width of the simulation pane.|
|24938||Added batch analysis confirmation window.|
|24972||Allow a config to be opened after its PCB design was renamed.|
|24993||Improved network rendering for more complex topologies.|
|25188||Improved Highlight Peak Value "In View" mode behavior.|
|25189||Aligned Probe X, Y coordinates units with AD units.|
|24523||Corrected via mesh data for current density.|
|24636||Fixed bug related to layout changes not propagating to PDNA.|
|24639||Corrected engineering notation representation of some numerical results.|
|24649||Corrected Settings form window height.|
|24662||Corrected HTML report least margins results.|
|24664||Changed certain HTML report results representation to engineering notation.|
|24665||Auto-close HTML Report generation window.|
|24911||Fixed ODB++ export for pads with offset holes.|
|24913||Fixed bug that reported a VRM's max pin current in the max power column.|
|24914||Fixed bug in a selection of the bottom item in DC Nets list.|
|24941||Corrected erroneous HTML report classification of Prepreg layers as Core.|
|24944||Fixed a bug that limited the number of sequential VRMs to 1.|
|24971||Fixed a bug that disallowed the changing of a DC Net's nominal voltage.|
|25044||Corrected a bug that resulted in the omission of top layer data in the Vias tab.|
|25045||VRM Vout value of 0V is no longer allowed.|
|25061||Fixed an issue with the propagation of network voltages change to the block diagram.|
|25064||Corrected linear VRM output voltage in negative supply scenarios.|
|25071||Corrected erroneous results display on negative supply voltage networks.|
|25076||Fixed a bug that blocked the ability to disable via current limits.|
|25078||Fixed an excessive delay that resulted from changing min/max load limits.|
|25119||Corrected ODB export error related to negative plane thermal reliefs.|
|25208||Fixed latent display of newly added loads.|
|25510||Fixed "Index was out of range" bug in HTML report generation.|
|25568||Corrected the metal resistivity/conductivity calculator in the Settings form.|
|25714||Fixed bug related to "Object reference not set.." analysis error.|
|25798||Fixed VRM power dissipation calculation.|
|26142||Corrected the behavior of the load 5/10% tolerance buttons for negative network voltages.|
|24002||Fixed bug where crash occurred when invoking or creating HTML report.|
|24003||Fixed simulation error: Can not find VIA vertices.|
|24004||Fixed a bug that caused a simulation error after tabbing out of a blank device parameter field.|
|24618||Corrected several minor typing errors in PDNA tooltips.|
|24543||Fixed unusually slow UI behavior on some installations.|
Altium has updated the PDN Analyzer extension by significantly enhancing its existing capabilities, adding numerous new features, and resolving issues and limitations in previous releases.
Build: 245 (for Altium NEXUS 1.0)
Date: 3 May 2017
|16685||Fix bug that caused PDNA Batch Mode crashes with large simulation count.|
|17253||Fix bug that caused internal layer planes to disappear during results viewing.|
Date: 15 February 2017
|10723||Added support to display the voltage relative to the nearest ground when probing. Both the VCC and GND voltages are reported.|
|11329||Added ability to set up config files for many power rails and run them as a batch.|
|11868||Updated the battery symbol.|
|15160||The output .csv file now uses comma delimiters.|
|15161||Disabled unnecessary processing of Mechanical layers in ODB++|
|15162||Updated PDN Analyzer so ODB++ is only regenerated within a session if the layout changes.|
|15837||Added ability to navigate/zoom in on areas of highest current density.|
|16536||Fixed regression bug that caused mid-layer polygon object to not be displayed.|
|10696||When probing the signals, lose the ability to maneuver in 3-D (shift + right mouse doesn't rotate the image).|
(Previously released version 18.104.22.168)
Altium and CST® have updated the PDN Analyzer extension. This version fixes cases where connections were missing between the pads of capacitors and their nets after simulation, and analysis was failing on a design due to meshing issues.
(Previously released version 22.214.171.124)
Altium and CST® have updated the PDN Analyzer extension. This version fixes cases where having semicolons (“;”) in components’ comments section caused a simulation failure.
(Previously released version 126.96.36.199)
Altium and CST® have updated the PDN Analyzer extension. This version fixes some cases where Version 188.8.131.52 could not load existing configuration files.
(Previously released version 184.108.40.206)
Altium and CST® have updated the PDN Analyzer extension to add new key capabilities, and resolve a number of simulation and interface issues. Below is a list of changes made to the current release of the extension and the issues that have been addressed.
Added the ability to view voltages and current densities of vias. Vias are now represented with appropriate color coding just as other power and ground shapes are. Display of vias can be toggled as are layers.
Added a ‘via wall thickness’ variable in the setup to comprehend vias as hollow objects. The effective area of vias is derated appropriately to represent their increased resistance due to the missing material. See the Via Wall Thickness section of the documentation for more information.
Improved the configuration file (
(Previously released version 220.127.116.11)
Altium has updated the PDN Analyzer extension to resolve an existing issue with designs which use the same pin designator for multiple pins. Below is detail of the issue addressed and changes made to the current release of the extension.
In previous versions of PDN Analyzer, using the same designator for multiple pins would cause the simulation to fail with the following (or similar) error messages:
This issue has now been resolved - simulations will complete successfully if the same pin designator is used for multiple pins.
(Previously released version 18.104.22.168)
Altium has updated the PDN Analyzer extension to resolve an existing issue with designs which have spaces in their component names. Below is detail of the issue addressed and changes made to the current release of the extension.
In previous versions of PDN Analyzer, component names with spaces would cause the simulation to fail with the following (or similar) error messages:
This issue has now been resolved - simulations will complete successfully if net names have spaces in them.
(Previously released version 22.214.171.124)
Altium has updated the PDN Analyzer extension to resolve existing issues and preclude analysis with invalid setup parameters. One primary aim is to eliminate the possibility of performing a lengthy PDN Analyzer simulation only to find it was invalid due to an erroneous setup parameter.
Below is a list of the issues addressed and changes made to the current release of the extension.
Check that load has non-zero amperage: entering 0A as a current sink is now not allowed.
Ensure valid stackup before enabling simulation. Checks stackup parameters and disables simulation if any are not valid:
Ensure a maximum of 2 nets in the path between the source and load power nets. If there are more than 2 nets between the source and load power nets, the user will be prompted by; “Many nets between source and loads, proceed with simulation?” (Yes, No). This warns the user that they may have built an erroneous path (see Source to Load path section in the PDN Analyzer Guide).
Report the cause of any red exclamation marks (!), so as to inform the user what has failed. If a red exclamation mark is shown, the failure will be printed in the messages dialog:
The maximum current densities reported by the auto-scale did not agree with maximum current density found when probing. For example, auto-scaling showed the maximum current density as 1.2GA/m2, while probing indicated that the largest current density was 0.2GA/m2 (the internal .json file verified a maximum current density of 1.2GA/m2). The software issue has been resolved, and probing now agrees with that reported by the auto-scale.
PDN Analyzer was not interpreting strings correctly: when converting the string "0Rab", if a is zero, the zero is discarded. This is now resolved.
Older pcbdoc's do not have a SimulationDummy.PcbDoc.htm file, so the simulation failed. This issue has been fixed.
Collection of data on errors. If you have agreed to participate in the Altium Product Improvement Program, the following data will be collected:
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