Altium Designer Documentation

Testpoint Clearance Check

Modified by Jason Howie on Apr 11, 2017

The ability to configure any pad or via to function as a testpoint is a valuable feature used during bare-board fabrication testing, and also during the assembly process. Bare-board flying-probe testing allows the fabricator to quickly test between each testpoint and every solder-exposed thru-hole pad and via on the board - delivering an extremely comprehensive test of positive net connectivity, and shorts.

A challenge with bare-board flying-probe testing has been the need to ensure that each testpoint maintains a minimum center-to-center clearance from adjacent pads and vias - otherwise the size of the flying-probe heads can prevent the testpoint and the neighboring pad/via from being simultaneously contacted.  

As part of the Altium Designer 15.1 update, the Testpoint Style rules have been enhanced to support the specification of the minimum allowed Distance to Pad Hole Centers and Distance to Via Hole Centers.

Configuring the Testpoint to Pad/Via Hole Center Distance

The minimum allowable distance from the center of a testpoint to the center of an adjacent pad/via is defined in the Fabrication Testpoint Style or the Assembly Testpoint Style design rules in the PCB Rules and Constraint Editor dialog, as shown below.

Specify the minimim clearance allowed between the center of the testpoint and the center of adjacent pads or vias.

The software checks the distance in accordance with the layer settings of the objects under test. For example, if a thru-hole pad is only configured to be a test point on the bottom layer, then the minimum clearance is not checked against other pads/vias on the top layer.

 

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