LatticeECP™
Part Number: 12-401-DB32
Device: LFECP33E-3FN672C
The LFECP33E-3FN672C device on the daughter board is a member of the 1.2V ECP family of FPGAs. The ECP provides a low-cost, high-density solution for applications such as those targeted to the consumer electronics industry. The entire ECP family includes five devices offering densities ranging from 6,100 to 32,800 LUTs. The LFECP33E-3FN672C offers 32,800 LUTs.
LFECP33E feature summary:
| Package | 672-Ball Fine Pitch Ball Grid Array (fpBGA672) – Lead Free |
| Speed Grade | 3 |
| Temperature Grade | Commercial |
| Pin Count | 672 |
| Maximum User I/O Pins | 496 |
| Max. Differential I/O Pairs | 248 |
| LUTs | 32.8K |
| Embedded (Block) RAM | 498K bits (over 54 blocks) |
| Distributed RAM | 131K bits |
| DSP Blocks | 8 |
| Embedded Multipliers | 64 (9x9); 32 (18x18); 8 (36x36) |
| Clock Managers (PLLs) | 4 |
| Global Clock Resources | 4 |
| Configuration Memory Required | 8,089,600 bits |
| On-Chip Termination Support | No |
Additional daughter board features:
- On-board memories available for use by FPGA design:
- 256K x 32-bit common-bus SRAM (1MByte)
- 16M x 32-bit common-bus SDRAM (64MByte)
- 16M x 16-bit common-bus Flash memory (32MByte)
- Dual 256K x 16-bit independent SRAM (512KByte each)
- 1-Wire® memory device used to store board ID and related information
More technical information on the LatticeECP daughter board >
Note: To implement a design on this FPGA device you will require the relevant vendor tools. For more information visit Vendor Tools page.
For information on all available NanoBoard configurations, pricing and availability contact your nearest Altium Sales & Support Center or VAR.
