Manufacturing Rule Types

At a Glance

This article introduces the Manufacturing design rule types available for PCB layout in Altium Designer, with a focus on how these rules help define fabrication limits and guide layout decisions. It specifically highlights rules such as Minimum Annular Ring and explains how manufacturing constraints can affect routing density, board reliability, and production cost. If you want a clearer understanding of how Altium Designer’s manufacturing rules influence practical PCB design tradeoffs, this article will give you useful context to make more informed layout choices, keep reading to strengthen your design decisions.

- Learn what the Manufacturing category of design rules covers in Altium Designer.
- Understand how rules like Minimum Annular Ring affect routing space and fabrication cost.
- See why balancing manufacturability and layout density is an important part of PCB design.
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The design rules of the Manufacturing category are described below.

The Manufacturing category of design rules.
The Manufacturing category of design rules.

Minimum Annular Ring

This rule specifies the minimum annular ring required for a pad or via. The annular ring is measured radially, from the edge of the pad/via hole to the edge of the pad/via (also referred to as the land perimeter).

Constraints

Constraint Manager – default constraints for the Minimum Annular Ring rule.

PCB Rules and Constraint Editor – default constraints for the Minimum Annular Ring rule.

 

Acute Angle

This rule specifies the minimum angle permitted between any objects in the same net. The Acute Angle rule works on nets only. It finds all the acute angles created by any objects in one net. The rule essentially creates a contour from all the primitives in a net (on the same layer) and then analyzes this contour for any points that might create an angle smaller than the acute angle limit value.

Constraints

Constraint Manager – default constraints for the Acute Angle rule.

PCB Rules and Constraint Editor – default constraints for the Acute Angle rule.

 

Hole Size

This rule specifies the maximum and minimum hole size for pads and vias in the design. The hole size is the diameter of the hole to be drilled through the pad/via during fabrication.

Constraints

Constraint Manager – default constraints for the Hole Size rule.

PCB Rules and Constraint Editor – default constraints for the Hole Size rule.

 

Layer Pairs

This rule checks to ensure that the used via types match the currently defined via types. The used via types are determined from the vias and pads found in the board. The permissible via types are defined on the Via Types tab of the Layer Stack Manager.

Constraints

Constraint Manager – default constraint for the Layer Pairs rule.

PCB Rules and Constraint Editor – default constraint for the Layer Pairs rule.

 

Hole To Hole Clearance

This rule ensures checking of manufacturing compatibility of drilled holes. When enabled, it will flag any multiple vias / pads at the same location, or overlapping pad / via holes. There is also an option to determine whether stacked micro vias are allowed or not.

Constraints

Constraint Manager – default constraints for the Hole To Hole Clearance rule.

PCB Rules and Constraint Editor – default constraints for the Hole To Hole Clearance rule.

 

Minimum Solder Mask Sliver

This rule helps identify narrow sections of solder mask that may cause manufacturing problems at a later stage. Ensuring that there is a minimum width of solder mask across the board, this rule checks that the distance between any two solder mask openings is equal to, or greater than, a user-specified minimum value. This includes the pads, vias, and any primitives that reside on solder mask layers. It also checks Top and Bottom sides independently.

Constraints

Constraint Manager – default constraint for the Minimum Solder Mask Sliver rule.

PCB Rules and Constraint Editor – default constraint for the Minimum Solder Mask Sliver rule.

 

Silk To Solder Mask Clearance

This rule checks the clearance between any silkscreen primitive and any solder mask primitive, or exposed copper-layer primitive (exposed through openings in the solder mask). The check ensures that the distance is equal to, or greater than, the value specified in the constraint.

Many manufacturers routinely strip (or 'clip') silkscreen to the mask opening and not just to the copper pad. However, doing so can render silkscreen text unreadable. Being able to catch such occurrences, through DRC, allows you to manipulate offending silkscreen text prior to sending the board to manufacturing.

Constraints

Constraint Manager – default constraints for the Silk To Solder Mask Clearance rule.

PCB Rules and Constraint Editor – default constraints for the Silk To Solder Mask Clearance rule.

 

Silk To Silk Clearance

This rule defines the minimum clearance allowed between text and other objects on a silkscreen layer.

Constraints

Constraint Manager – default constraint for the Silk To Silk Clearance rule.

PCB Rules and Constraint Editor – default constraint for the Silk To Silk Clearance rule.

 

Net Antennae

This rule operates at a net level in the design to flag any open-ended track/arc primitive, or open-ended track/arc that is terminated with a via, and thus forms an antenna.

Constraints

Constraint Manager – default constraint for the Net Antennae rule.

PCB Rules and Constraint Editor – default constraint for the Net Antennae rule.

 

Board Outline Clearance

This rule defines the minimum clearance allowed from design objects that are fabricated, to edges of the board. Either a single clearance value can be specified for all object-to-edge possibilities, or different clearances for different pairings can be defined, through the use of a dedicated Minimum Clearance Matrix. The terms Board Outline and Board Edge are general names used interchangeably to describe the outer edge of the board. The term edge is defined in the table below the image. The Board Outline Clearance design rule checks object-to-edge clearances on the electrical and overlay (silkscreen) layers.

Constraints

Constraint Manager – default constraints for the Board Outline Clearance rule.

PCB Rules and Constraint Editor – default constraints for the Board Outline Clearance rule.

 
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Feature Availability

The features available to you depend on which Altium solution you have – Altium Develop, Altium Agile Teams, Altium Agile Enterprise, or Altium Designer (on active term).

If you don’t see a documented feature in your actual software, contact Altium Sales to find out more.

Legacy Documentation

Altium Designer documentation is no longer versioned. If you need to access documentation for older versions of Altium Designer, visit the Legacy Documentation section of the Other Installers page.

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