Manufacturing - Board Outline Clearance

Now reading version 20.2. For the latest, read: Manufacturing - Board Outline Clearance for version 21
Applies to Altium Designer versions: 18.0, 18.1, 19.0, 19.1, 20.0, 20.1 and 20.2
 

Rule category: Manufacturing

Rule classification: Unary

Summary

This rule defines the minimum clearance allowed from design objects that are fabricated, to edges of the board. Either a single clearance value can be specified for all object-to-edge possibilities, or different clearances for different pairings can be defined, through the use of a dedicated Minimum Clearance Matrix. The terms Board Outline and Board Edge are general names used interchangeably to describe the outer edge of the board. The term edge is defined in the table below the image. The Board Outline Clearance design rule checks object-to-edge clearances on the electrical and overlay (silkscreen) layers.

All design rules are created and managed within the PCB Rules and Constraints Editor dialog. For a high-level view of working with the design rules system, see Defining, Scoping & Managing PCB Design Rules.

Constraints

Default constraints for the Board Outline Clearance rule.Default constraints for the Board Outline Clearance rule.

Edge Type Definition
Outline Edge The outer-most (exterior) edge of the board
Cavity Edge The edge of a user-defined cavity
Cutout Edge The edge of a user-defined cutout
Split Barrier When a Split Line defines the edge of the board on this layer, this edge is referred to as a Split Line Barrier
Split Continuation When this layer continues beyond a Split Line, this edge is referred to as a Split Line Continuation (a permeable boundary). To allow an object-kind to cross a Split Continuation, set the clearance value to zero. Zero indicates that for these object-kinds, this is a continuation layer, and the objects are allowed to violate (pass over) the split line. Use this technique to allow routed tracks, for example, to travel across from one Layer Stack Region to another.
  • Minimum Clearance - the value for the minimum clearance required. A value entered here will be replicated across all cells in the Minimum Clearance Matrix. Conversely, when a different clearance value is entered for one or more object pairings in the matrix, the Minimum Clearance constraint will change to N/A, to reflect that a single clearance value is not being applied across the board.
  • Minimum Clearance Matrix - provides the ability to fine tune clearances between the various object-to-edge clearance combinations in the design.
The default Board Outline Clearance rule for a new PCB document will default to use 10mil for all object-to-edge clearance combinations. When creating a subsequent new rule, the matrix will be populated with the values currently defined for the lowest priority Board Outline Clearance rule.
To allow an object-kind to cross an edge, set the clearance value to zero. Zero indicates to the software that an object-kind is allowed to violate (pass over) this edge type. Use this technique to allow routed tracks, for example, to travel across from one Layer Stack Region to another.

Working with the Clearance Matrix

Definition of clearance values in the matrix can be performed in the following ways:

  • Single cell editing - to change the minimum clearance for a specific object pairing.
  • Multi-cell editing - to change the minimum clearance for multiple object pairings:
    • Use Ctrl+Click, Shift+Click, and Click+Drag to select multiple cells in a column.
    • Use Shift+Click, and Click+Drag to select multiple contiguous cells in a row.
    • Use Click+Drag to select multiple contiguous cells across multiple rows and columns
    • Click on a row header to quickly select all cells in that row.
    • Click on a column header to quickly select all cells in that column.

With the required selection made (either a single cell or multiple cells), making a change to the current value is simply a case of typing the new value required. To submit the newly entered value, either click away on another call, or press Enter. All cells in the selection will be updated with the new value.

To set a single clearance value for all possible object pairings, simply set the required value for the Minimum Clearance constraint. On clicking Enter, this value will be replicated across all applicable cells of the matrix. Alternatively, click the blank grey cell at the top-left of the matrix, or use the Ctrl+A shortcut. This selects all cells in the matrix, ready to accommodate a newly-entered value.

How Duplicate Rule Contentions are Resolved

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application

Online DRC, Batch DRC, interactive routing, and autorouting.

Note

The features available depend on your level of Altium Designer Software Subscription.

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