Electrical Rule Types

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Altium Essentials: PCB Design Rules Creation

This content is part of the official Altium Professional Training Program. For full courses, materials and certification, visit Altium Training.

At a Glance

This article walks through the Electrical design rules available in Altium Designer for PCB layout, with a strong focus on the Clearance rule and how it controls minimum spacing between copper objects. It explains how rule scoping works, how to apply constraints for same net, different net, and differential pair cases, and how to fine tune settings using the Minimum Clearance Matrix in both Simple and Advanced modes. It also covers practical editing methods, hole-to-object clearance checking, and layer-based clearance behavior where supported, helping you understand how these rules are configured and applied in real PCB designs. If you want a clearer grasp of how Altium Designer handles electrical spacing requirements in layout, this article is worth reading and will help you work with more confidence.

- Learn how the Clearance rule defines spacing between PCB objects, including nets, differential pairs, pads, vias, holes, and copper features.
- See how to use the Minimum Clearance Matrix, Simple and Advanced modes, and editing shortcuts to create more targeted clearance rules.
- Understand special clearance cases such as same-net via to SMD pad checking, hole-to-object clearance, and layer-specific clearance behavior.
Go Deeper with AI:

The design rules of the Electrical category are described below.

The Electrical category of design rules.
The Electrical category of design rules.

Learn more about Defining, Scoping & Managing PCB Design Rules.

Clearance

This rule defines the minimum clearance allowed between any two primitive objects on a copper layer. Either a single value for clearance can be specified, or different clearances for different object pairings, through use of a dedicated Minimum Clearance Matrix. The latter, in combination with rule-scoping, provides the flexibility to build a concise and targeted set of clearance rules to meet even the most stringent of clearance needs.

Constraints

Constraint Manager – the Clearance constraint can be defined to apply between all types of objects, or specific values can be defined between specific objects. Constraints can also be constrained by Layer. 

PCB Rules and Constraints Editor – the Clearance constraint can be defined to apply between all types of objects, or specific values can be defined between specific objects. Simple and Advanced modes are available, their differences are described below.

 

Short-Circuit

This rule tests for short circuits between primitive objects on the copper (signal and plane) layers. A short circuit exists when two objects that have different net names touch.

Constraints

Constraint Manager – default constraints for the Short-Circuit rule.

PCB Rules and Constraint Editor – default constraints for the Short-Circuit rule.

 

Un-Routed Net

The PCB Editor's Design Rule Checking system typically sees a net as being routed if all nodes in that net (component pads) are connected through the use of net-aware design objects (tracks, arcs, pads, vias, and polygons). These objects are considered connected if they touch each other. However, while simply touching makes a perceived connection to the software, when it comes time to fabricate the board, the fragility of some of these 'connections' can cause critical issues, especially where the objects - for example two contiguous track segments, or a track entering a pad/via - are only slightly touching. Such connections are often referred to as 'Bad Connections', 'Poor Connections', or 'Incomplete Connections'. Use this rule to test for such poor connections.

Constraints

Constraint Manager – Default constraints for the Un-Routed Net rule

PCB Rules and Constraint Editor – default constraints for the Un-Routed Net rule

 

Un-Connected Pin

This rule detects pins that have no net assigned and no connecting tracks.

Constraints

Modified Polygon

This rule detects polygons that are still shelved and/or have been modified but have not yet been repoured.

Constraints

Constraint Manager – default constraints for the Modified Polygon rule.

PCB Rules and Constraint Editor – default constraints for the Modified Polygon rule.

 

Creepage Distance

This rule tests the creepage distance between the targeted signals across the board surface through unplated holes, cutouts, and around the board edge. 

Constraints

Constraint Manager – default constraints for the Creepage distance rule.

PCB Rules and Constraint Editor – default constraints for the Creepage distance rule.

 

Z-Axis Clearance

This feature is in Open Beta and available when the PCB.Rules.ZAxisClearanceRule option is enabled in the Advanced Settings dialog.

This rule tests the minimum clearances between various primitives on different copper layers.

Constraints

Constraint Manager – default constraints for the Z-Axis Clearance distance rule.

PCB Rules and Constraint Editor – default constraints for the Z-Axis Clearance distance rule.

 

 

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