New in Altium Designer

This page details the improvements included in releases of Altium Designer, Altium Designer Develop and Altium Designer Agile. Along with delivering a range of improvements that develop and mature the existing technologies, each update also incorporates a number of fixes and enhancements across the software based on feedback raised by customers through the AltiumLive Community's BugCrunch system, helping you continue to create cutting-edge electronics technology.

Altium Agile and Altium Designer users: When you update your Altium Designer Agile or Altium Designer installation to a newer version and you use a Standalone or Private Server license, you may need to reactivate/refresh the license to be able to access and use new features and functionality. For more information, refer to the following pages:

Version 26.5

Altium Designer Develop – Released: 8 April 2026 – Version 26.5.0 (build 11)
Altium Designer Agile – Released: 8 April 2026 – Version 26.5.0 (build 17)
Altium Designer – Released: 8 April 2026 – Version 26.5.0 (build 11)

Release Notes for Altium Designer

Schematic Capture Improvement

Added Ability to Define Pin's Vertical Margin

You now define a custom vertical margin for a pin's designator and name. This gives you full control over horizontal (X) and vertical (Y) margins. Margins can be defined globally on the Schematic - General page of the Preferences dialog in the Pin Settings region in the Designator and Margin (X/Y) fields. To define margins locally, use the Margin (X/Y) fields in the Properties panel. 

Define pin vertical margins globally on the Schematic - General page of the Preferences dialog.

Define pin vertical margins locally on the Properties panel.

 

The pin's vertical margin is defined using the new Pin Designator Vertical Margin and Pin Name Vertical Margin fields in the List panels and the Find Similar Objects dialog. In addition, two new query keywords are available in the SCH Functions\Fields category – PinDesignator_CustomPosition_VerticalMargin and PinName_CustomPosition_VerticalMargin – for targeting the vertical margin of these two properties when crafting logical query expressions.

For more information, refer to the Creating a Schematic Symbol page.

PCB Design Improvement

ODB++ Intellectual Property Protection (Open Beta)

This release brings the ability to configure ODB++ setup to protect your valuable intellectual property (IP) by restricting what is generated.

In the ODB++ Setup dialog, you have the ability to select which signal layers to export as part of the generated data. In addition, you can control whether the netlist is included and, if so, whether to neutralize it (by replacing net names with Net_[1-…]). You also can control whether to include components, with the possibility to remove component properties (parameters).

Folder path information will also be removed from generated report ([Design name].REP) and rule (odb\user\[Design name].RUL) files.

There is currently a limitation in that ODB++ data generated with no signal layers and dielectrics at all, along with export of drill-pair data, will not import into CAMtastic in a previous version of Altium Designer. It is advised to follow one of the following workarounds:

  • Import the generated ODB++ data into the CAMtastic editor of this latest version of Altium Designer. It can then be saved and will open correctly in the CAMtastic editor in a previous version of the software.

  • If you need to exclude all copper/dielectric layers from generated ODB++ data, disable export of drill pairs as well.

  • If exporting drill pairs, then include at least one signal layer in the exported ODB++ data.

This feature is in Open Beta and available when the ODB.IntellectualPropertyProtection option is enabled in the Advanced Settings dialog.

For more information about preparing ODB++ fabrication data, refer to the Preparing Fabrication Data page.

Wire Bonding Improvement

Wire Bonding 3D Enhancements (Open Beta)

This release brings enhanced support for bond wires in the 3D view of a board. This includes:

  • Additional editing controls for defining the shape/profile of a bond wire. You can now specify a start Angle (α) and end Angle (β).

    Note that when Angle (α) is set to 90, the value of Angle (β) is defined automatically and cannot be changed.

    The Die Bond Type option has been renamed Type, with a more intuitive selection that reflects the start and end of the bond wire (either Ball - Wedge or Wedge - Wedge). You also have the ability to enable and specify an Override Color for a bond wire. This facilitates being able to distinguish between different bond wire 'tiers' associated with different cycles of a wire bonding machine when generating a wire bonding assembly diagram.

  • The ability to place die pads and bond wires on generic 3D bodies (STEP, SOLIDWORKS Part and Parasolid model formats, as well as extruded 3D bodies). When placed on a generic 3D body, die pads will be automatically placed at the body height under the pad center.

    In this example, a Parasolid format model is used as a die.
    In this example, a Parasolid format model is used as a die.

  • The inclusion of bond wire objects in Component Clearance checking, to detect clearance violations between bond wires and other (non bond wire) objects in the 3D space.

    An example of a collision detected between a bond wire and a 3D body.
    An example of a collision detected between a bond wire and a 3D body.

    Note that bond wire to bond wire distance is detected, as before, through use of a Wire Bonding rule.

  • Bond wire objects are now included when exporting a PCB to STEP and Parasolid formats.

In addition, colors used for bond wires in the PCB design are now taken into account when placing a board fabrication view, board assembly view and component view into a PCB manufacturing drawing (*.PCBDwf). You can choose to use the layer color or override color (if specified for bond wires on the PCB side).

An example of Draftsman's board assembly view with bond wires shown with their override colors. Note that the relevant Wire Bonding layer needs to be enabled on the Layer tab of the view's Properties panel.

An example of Draftsman's board fabrication view with bond wires shown with their override colors. Note that the relevant Wire Bonding layer needs to be enabled on the Layer tab of the view's Properties panel.

An example of Draftsman's component view with bond wires shown with their override colors.

 

Also, when using the enhanced support for bond wires, the following features are available:

  • Bond Wires is available added as an object to the Selection Filter, accessed from the Active Bar and the Properties panel (pre- and post-selection filtering) – .

  • Bond Wire has been added as a distinct object type (when filtering the display of objects) in both PCB List and PCBLIB List panels – .

  • When using Layer Sets, the Die and Wire Bonding layers are now part of the Signal Layers layer set – .

This feature is in Open Beta and available when the PCB.Wirebonding.3DImprovements option is enabled in the Advanced Settings dialog.

For more information about wire bonding, refer to the Wire Bonding page.

Data Management Improvements

Enhanced Design Reuse Panel (Open Beta)

This feature gives you the latest, enhanced Design Reuse panel when working with reuse blocks and snippets.

This feature is in Open Beta and available when the UI.ModernDesignReusePanel option is enabled in the Advanced Settings dialog. To allow further development and rework, the 'Formal Design Reuse Blocks' feature has been removed from Closed Beta, along with its associated option (System.DesignReuse2.0).

For more information, refer to the Working with Reuse Blocks page.

Enhanced Footprint Model Management in the Item Manager

The Item Manager has been enhanced to address the case where a Workspace component has multiple footprint models defined and the currently assigned model subsequently has its name changed.

A Workspace component can have multiple footprint models assigned. If the currently assigned footprint model subsequently has its name changed and saved back to the Workspace (which creates a new revision of the footprint model) and then the Workspace component itself is saved back to the Workspace (creating a new component revision that uses the new footprint model revision), instances of the component already placed in a design need an update to the latest revision. In this case, the Automatch and Update to latest revision commands of the Item Manager can be used. These features now correctly assign the latest revision of the footprint model whose name has changed.

Instances of a component that have multiple footprints assigned are placed in a design (R207 and R208).

Names of the footprint models assigned to the component have been changed.

After using the Update to latest feature in the Item Manager, footprints are correctly assigned to the updated components. 

 

For more information about the Item Manager, refer to the Managing Content with the Item Manager page.

Latest Revision Check in Batch Component Editing

The component rule check Revision that is being edited is not latest is now correctly observed when editing one or more Workspace components using the Component editor in Batch Component Editing mode. This ensures that violations are flagged when editing a component that is not the latest revision available in the Workspace.

In the example shown below, four component revisions are being edited in the Component editor in Batch Component Editing mode. Each revision is not the latest (i.e., later revisions of these components are available in the Workspace), and a violation is flagged for each revision. 

For more information about verifying a component before saving it to a Workspace, refer to the Validating a Component page.

Feature Made Fully Public in Altium Designer 26.5

The following feature is now officially Public with this release:

Additional Feature in Altium Designer 26.5

  • Partial LFS Repository Support: A new advanced settings option – VCS.AllowLFSRepos – is available in the Advanced Settings dialog with this release which, when enabled, restores previous, partial ability to use LFS repositories when working with Git version control. CAUTION: Altium Designer does not fully support working with LFS repositories and, in some cases, doing so can lead to loss of user data.

Version 26.4

Altium Designer Develop – Released: 19 March 2026 – Version 26.4.1 (build 13)
Altium Designer Agile – Released: 19 March 2026 – Version 26.4.1 (build 25)
Altium Designer – Released: 19 March 2026 – Version 26.4.1 (build 12)

Release Notes for Altium Designer

Version 26.3

Altium Designer Develop – Released: 5 February 2026 – Version 26.3.0 (build 5)
Altium Designer Agile – Released: 5 February 2026 – Version 26.3.0 (build 18)
Altium Designer – Released: 5 February 2026 – Version 26.3.0 (build 6)

Release Notes for Altium Designer

Version 26.2

Altium Designer Develop – Released: 8 January 2026 – Version 26.2.0 (build 10)
Altium Designer Agile – Released: 8 January 2026 – Version 26.2.0 (build 28)
Altium Designer – Released: 8 January 2026 – Version 26.2.0 (build 7)

Release Notes for Altium Designer

Version 26.1

Altium Designer Develop – Released: 3 December 2025 – Version 26.1.0 (build 6)
Altium Designer Agile – Released: 3 December 2025 – Version 26.1.0 (build 13)
Altium Designer – Released: 3 December 2025 – Version 26.1.0 (build 7)

Release Notes for Altium Designer

 

If you find an issue, select the text/image and pressCtrl + Enterto send us your feedback.
Feature Availability

The features available to you depend on which Altium solution you have – Altium Develop, an edition of Altium Agile (Agile Teams or Agile Enterprise), or Altium Designer (on active term).

If you don’t see a discussed feature in your software, contact Altium Sales to find out more.

Legacy Documentation

Altium Designer documentation is no longer versioned. If you need to access documentation for older versions of Altium Designer, visit the Legacy Documentation section of the Other Installers page.

Content