Board Panelization

Now reading version 22. For the latest, read: Board Panelization for version 24

A printed circuit board is not fabricated as a single entity; typically a number of boards are fabricated on a panel. The panel can be defined by the fabricator, or alternatively, the board designer can create a panel in the PCB editor, using a feature referred to as an Embedded Board Array, also known as panelization.

An Embedded Board Array is a primitive design object that you place into the PCB design space and link to an existing board file. The Embedded Board Array stamps out the linked board from 1 to n times at the specified spacing. By placing multiple Embedded Board Arrays, you also can create a fabrication panel of different boards, or the same board can be laid out in a step and turn pattern.

The image below shows a board repeated eight times in a step and turn pattern (alternate boards flipped). This was created by placing two Embedded Board Arrays; one with the boards facing up and the other with the boards flipped. The layer stack, dimensioning, V-groove, and route information has been added in this file rather than in the original source PCB.

Since the Embedded Board Array links to the source PCB, any design changes made in the source PCB are loaded into the Embedded Board Array the next time the array board file is opened.

A key part of the panelization process is defining how the individual boards are to be separated. There are two common approaches: V-groove panelization or breakaway-tab panelization. V-groove panelization is inexpensive and effective for rectangular shaped boards; non-rectangular boards must use breakaway tabs.

To create breakaway-tab panelization, define a route tool path slot around the edge of each board, leaving small sections of remaining board that are perforated by a series of small holes, as shown in the adjacent image.

The route tool path is defined by placing track objects on a mechanical layer, which is then nominated as the Route Tool Path layer in the Properties panel (also shown in the image). Use the Create Primitives from Board Shape command to outline the board shape with tracks/arcs that define the route tool path, then edit them as required to create the breakaway tab regions. The breakaway tabs, also referred to as mouse bites, are created by placing a row of small unplated pads.

To learn more about panelization, read these excellent, detailed panelization guidelines, published on the Electronic Design website.

If you are building a panel consisting of different PCB boards, it is important that you ensure the layer stackup for each board is compatible. On placement of an Embedded Board Array, you will be notified of any layer stack discrepancies. A status message about stack layer compatibility is also available in the Embedded Board Array mode of the Properties panel.


After launching the embedded board array command (Place » Embedded Board Array/Panelize), the cursor will change to a crosshair and you will enter embedded board array placement mode. The location of the crosshair decides the lower-left corner of the board array.

  1. Position this corner of the array at the required location then click or press Enter to place.
  2. Continue placing further embedded board arrays or right-click or press Esc to exit placement mode.
If a placed array does not yet reference a PCB document, there will be only a red crosshair to represent the blanket array.

Graphical Editing

This method of editing allows you to select a placed embedded board array object directly in the design space and change its location or orientation graphically.

When an embedded board array object is selected, it is distinguished by a light gray background. The below images illustrate an un-referenced board array (first image) and a 2 x 2 array that references a single PCB design (second image).

An un-referenced board array
An un-referenced board array

A 2 x 2 array that references a single PCB design
A 2 x 2 array that references a single PCB design

Click anywhere within the boundary of the array then drag to reposition it. The array is automatically 'grabbed' by its lower-left corner and the board array's location is used as the anchor point to the cursor. The embedded board array can be rotated or flipped while dragging in the following ways:

  • Press the Spacebar to rotate the embedded board array. Rotation is counterclockwise.
  • Press the L key to flip the embedded board array to the other side of the board.


  • The embedded board array(s) used to create a representation of the manufacturing panel should be placed on a separate PCB document within the existing or alternate PCB project. This document should be considered the manufacturing 'hub' for other PCB documents that contain the actual designs.
  • You can place additional objects to support panel manufacturing (for example, free pads as tooling holes), however, it is not advisable to place any other objects that would represent the actual physical design within the same document as the embedded board array(s).
  • Since the embedded board array object references a PCB design file rather than containing a pasted copy of it, the source PCB design may be modified at any time. Once the reference file is saved, refresh the view of the panel document in order to bring the panel up-to-date.
  • Gerber, NC Drill, ODB++, and printed output can be generated from a panel of embedded board arrays.
  • When using the Design » Board Shape » Create Primitives From Board Shape command's Route Tool Outline option, you also can select the Include Cutouts option to simulate tool paths that contour board cutout edges.
  • The software automatically attempts to resolve layer stack compatibility issues. The automatic layer stack synchronization process will attempt to:
    • Ensure that all required child board layer stack ordered layers exist in the parent board (the PCB file containing the embedded board array).
    • Modify the parent board layer stack in an attempt to achieve synchronization - a child board is never modified.
    • Make only additive or layer type modifications to the parent board, layers are never removed.
  • Note that the counterhole features are not currently supported by an embedded board array and its Drill Table and Hole Size Editor.
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