Altium Designer
Design Rules & Constraint Manager

Key Topics Covered:

• Accessing Altium Platform - Learn how to access the designated training workspace and connect to the Altium Platform environment
• Training Folder Structure - Navigate the training workspace, understand the project organization, and locate exercise files and reference materials
• Design Environment Preparation - Configure the Altium Designer environment and familiarize yourself with the Constraint Manager interface for the exercises to follow 

Key Topics Covered: 

• Default Design Rules - Understand the structure and hierarchy of Altium Designer’s default design rules, including rule types, priorities, and scoping mechanisms
• Rule Configuration and Customization - Learn how to create, modify, and manage design rules for electrical clearances, trace widths, via sizes, and other critical parameters within the Constraint Manager
• Net Classes - Define and manage net classes to group related nets, enabling efficient rule application across power, signal, and high-speed net groups
• Constraint Manager Navigation - Gain hands-on experience navigating the Constraint Manager interface to view, edit, and apply constraints across the design 

Key Topics Covered: 

• Differential Pairs - Define differential pair relationships, configure spacing and impedance constraints, and manage differential pair classes for high-speed signal routing
• Using Design Queries - Master the query language to create precise rule scopes, target specific nets, components, or regions, and build complex conditional rules using the Query Builder and manual query expressions
• Advanced Scoping Techniques - Combine design queries with net classes and component classes to create sophisticated, context-aware design rules 

Key Topics Covered: 

• Length Matching - Configure matched-length rules for signal groups, define tolerance constraints, and use interactive length tuning tools to achieve precise timing alignment in high-speed interfaces
• xSignals - Understand and define xSignals to represent complete signal paths through series passive components, enabling accurate length and timing analysis across net boundaries
• xSignal Configuration and Management - Create xSignal definitions from schematic and PCB, manage xSignal classes, and apply matched-length constraints to xSignal groups for interfaces such as DDR, USB, and PCIe
• Practical Length Tuning - Hands-on exercises using the interactive length tuning router to meet matched-length constraints while maintaining clean routing 

Key Topics Covered: 

• HDI Vias - Configure via rules for HDI designs, including microvias, blind vias, buried vias, and via-in-pad strategies, with proper layer span and aspect ratio constraints
• Rules for DFM and DFA - Define Design for Manufacturing (DFM) and Design for Assembly (DFA) rules to ensure board designs meet fabrication house capabilities and assembly process requirements
• Creepage - Configure creepage and clearance constraints based on voltage ratings and safety standards (such as IPC-2221 and IEC 60950/62368), ensuring designs meet regulatory compliance requirements
• Constraint Verification and DRC - Run design rule checks to validate all configured constraints, identify and resolve violations, and prepare designs for manufacturing handoff 

Key Topics Covered:

• Accessing Altium Platform - Learn how to access the designated training workspace and connect to the Altium Platform environment
• Training Folder Structure - Navigate the training workspace, understand the project organization, and locate exercise files and reference materials
• Design Environment Preparation - Configure the Altium Designer environment and familiarize yourself with the Constraint Manager interface for the exercises to follow 

Key Topics Covered: 

• Default Design Rules - Understand the structure and hierarchy of Altium Designer’s default design rules, including rule types, priorities, and scoping mechanisms
• Rule Configuration and Customization - Learn how to create, modify, and manage design rules for electrical clearances, trace widths, via sizes, and other critical parameters within the Constraint Manager
• Net Classes - Define and manage net classes to group related nets, enabling efficient rule application across power, signal, and high-speed net groups
• Constraint Manager Navigation - Gain hands-on experience navigating the Constraint Manager interface to view, edit, and apply constraints across the design 

Key Topics Covered: 

• Differential Pairs - Define differential pair relationships, configure spacing and impedance constraints, and manage differential pair classes for high-speed signal routing
• Using Design Queries - Master the query language to create precise rule scopes, target specific nets, components, or regions, and build complex conditional rules using the Query Builder and manual query expressions
• Advanced Scoping Techniques - Combine design queries with net classes and component classes to create sophisticated, context-aware design rules 

Key Topics Covered: 

• Length Matching - Configure matched-length rules for signal groups, define tolerance constraints, and use interactive length tuning tools to achieve precise timing alignment in high-speed interfaces
• xSignals - Understand and define xSignals to represent complete signal paths through series passive components, enabling accurate length and timing analysis across net boundaries
• xSignal Configuration and Management - Create xSignal definitions from schematic and PCB, manage xSignal classes, and apply matched-length constraints to xSignal groups for interfaces such as DDR, USB, and PCIe
• Practical Length Tuning - Hands-on exercises using the interactive length tuning router to meet matched-length constraints while maintaining clean routing 

Key Topics Covered: 

• HDI Vias - Configure via rules for HDI designs, including microvias, blind vias, buried vias, and via-in-pad strategies, with proper layer span and aspect ratio constraints
• Rules for DFM and DFA - Define Design for Manufacturing (DFM) and Design for Assembly (DFA) rules to ensure board designs meet fabrication house capabilities and assembly process requirements
• Creepage - Configure creepage and clearance constraints based on voltage ratings and safety standards (such as IPC-2221 and IEC 60950/62368), ensuring designs meet regulatory compliance requirements
• Constraint Verification and DRC - Run design rule checks to validate all configured constraints, identify and resolve violations, and prepare designs for manufacturing handoff