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Parent category: Violations Associated with Nets
Default report mode:
This violation appears when a differential pair net is not connected to a differential pair pin of a physical device.
If compiler errors and warnings are enabled for display on the schematic (enabled on the Schematic - Compiler page of the Preferences dialog), an offending object will display a colored squiggle beneath it. Hovering over the object will display a pop-up hint that summarizes the violation. A notification is also displayed in the Messages panel in the following format:
Net
<NetName> of differential pair
<PairName> is not connected to a differential pair pin
where:
V_RX1_N
or V_RX1_P
)V_RX1
).A true differential pair pin is hard-wired for a physical device (e.g., a Xilinx Virtex-II Pro FPGA device). Although such a pin may appear with the identifier N
(for negative) or P
(for positive) as part of its name, you cannot make a pin differential simply by changing its name.
Use the Details region of the Messages panel to quickly cross probe to the pin to which the differential pair net is currently connected. Consider the following when resolving a violation of this type:
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