Компиляция и верификация проекта

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Parent page: Capturing Your Design Idea as a Schematic

Schematic Validation and Configuring the Verification Options

To validate your design, choose the Validate PCB Project <ProjectName> command from the main Project menu. To validate the project focused in the Projects panel, you can also use the  control at the top of the panel.

Validate your design using the Validate PCB Project &lt;ProjectName&gt; command.
Validate your design using the Validate PCB Project <ProjectName> command.

The software checks for logical, electrical, and drafting errors between the Unified Data Model and project checking settings. If validation errors and warnings are enabled for display on the schematic (enabled on the Schematic – Compiler page of the Preferences dialog), an offending object will display a colored squiggle beneath it. Hovering over the object will display a pop-up hint that summarizes the violation. A notification is also displayed in the Messages panel.

Use the controls associated with the Object Hints entry in the Connectivity Insight Options region (the System – Design Insight page of the Preferences dialog) to determine the launch style for object hints (Mouse Hover and/or Alt+Double Click).

There are a large number of drafting and electrical checks that can be performed on the validated design. These are configured as part of the project options. Select the Project » Project Options command from the main menus to open the Project Options dialog. The default settings will not suit every design and, therefore, it is important to become familiar with the options and how to configure them to suit your design.

Drafting Checks

During validation, common drafting and editing errors are checked in accordance with the settings on the Error Reporting tab of the Project Options dialog. The error checks are organized in groups, for example, Violations Associated with Nets, Violations Associated with Components, etc. The groups are listed alphabetically in the dialog. The Report Mode of each violation can be changed to one of four values by clicking on it and selecting the desired value in the drop-down.

Configure the required error checks on the Error Reporting tab of the Project Options dialog. Click within the Report Mode cell of a violation to change it for this violation.
Configure the required error checks on the Error Reporting tab of the Project Options dialog. Click within the Report Mode cell of a violation to change it for this violation.

Generally, it is better to first validate the design and examine the warnings with the default settings. For those warnings that are not an issue for the current design, the reporting level can be changed.

See the PCB Design Violation Types section below for detailed information about each error check.

Connectivity Checks

The electrical connectivity is checked in accordance with the settings on the Connection Matrix tab of the Project Options dialog.

The Connection Matrix defines which electrical conditions are allowed and which are not allowed.
The Connection Matrix defines which electrical conditions are allowed and which are not allowed.

The matrix provides a mechanism to establish connectivity rules between component pins and net identifiers, such as Ports and Sheet Entries. It defines the logical or electrical conditions that are to be reported as warnings or errors. For example, an output pin connected to another output pin would normally be regarded as an error condition, but two connected passive pins would not.

Click on the small square in the matrix to change a particular rule. Each rule determines the reporting level for a given pin/net identifier combination. There are four possible values for each rule: Fatal Error, Error, Warning, and No Report.

The Error Reporting and Connection Matrix settings must be examined and set to suit the requirements of the current project.

Interpreting Messages and Locating Errors

When the project is validated, every condition that generates a warning or error is listed in the Messages panel. Note that the Messages panel will only open automatically if there is at least one Error or Fatal Error condition. To check for a Warning, you will need to open the panel manually by clicking the Panels button on the bottom-right of the design space then choose Messages. Once the project has been validated, the panel will list any warnings and errors that have been detected.

The Messages panel displays the warnings and errors detected in the project.
The Messages panel displays the warnings and errors detected in the project.

The Messages panel is command central for presenting violations. Things to be aware of include:

  • The Messages panel has two regions – the upper grid region summarizes the warnings/errors; the lower region gives details of the currently selected warning/error.
  • Double-click on a message to cross-probe to that warning/error. Double-click on a detail to show that specific object.
  • You can click on any of the Messages panel column headings (e.g., Class, Document, Message) to assist in sorting the errors and warnings.
  • Right-click in the Messages panel then use the Group By sub-menu options to group the errors and warnings by a specific criteria.
  • Right-click in the Messages panel then use the appropriate Clear command to delete messages or use the Export To Report command to export the messages to a report.

    Clearing messages does not necessarily mean the messages have been resolved. The same unresolved messages will be listed after performing validation again. Message clearance is a visual aid when resolving errors in the design that allows you to manually remove messages as you feel they have been resolved. Validation must be launched again to obtain an up-to-date picture of any violations that still exist.
  • The panel includes warnings and errors detected from settings in both the Error Reporting tab and the Connection Matrix tab.
  • When you right-click on a warning/error in the Messages panel then select the Place Specific No ERC for this violation command, you will automatically cross-probe to the error location and a No ERC directive will appear on the cursor, ready to place on the error location. Press Tab to edit the properties of the directive prior to placement, if required:
    • As a generic directive, suppress all error checks at the point that the directive is placed.
    • As a specific directive, only suppress the specified error checks at the point that the directive is placed.

Resolving a Warning or Error

It is important to address each warning or error that is detected. The default error settings tend to be conservative since it is better for the software to err on the side of being cautious and let you decide if the testing boundaries can be relaxed. For example, your design may require IO pins to be connected to Input ports, requiring you to adjust the appropriate cell in the Connection Matrix tab. Another common error check to be changed is the Nets with no driving source, requiring you to disable that check in the Error Reporting tab.

There will be situations when you want to test the entire design for a certain condition, but you want to ignore a warning/error at a specific point in the circuit. For example, you might want to allow a net to be renamed at a specific location, but only in that location. This can be done by placing a No ERC directive at that location.

Using the No ERC Directive

Object page: No ERC

When you need to allow a specific point in the circuit to not report an error, place a No ERC (Electrical Rules Check) directive on that point (Place » Directives » Generic No ERC) meaning do not flag a warning/error at this location. Set the No ERC symbol style and color to suit its role in the circuit in the No ERC mode of the Properties panel.

Place No ERC directives to suppress warnings or errors at a specific location.
Place No ERC directives to suppress warnings or errors at a specific location.

Note that No ERC directives can be excluded from printouts, if required, by enabling the relevant option(s) in the Print dialog.

No ERC directives can be excluded from schematic printouts by configuring related options in the Print dialog.
No ERC directives can be excluded from schematic printouts by configuring related options in the Print dialog.

You can place a Specific No ERC directive directly at the error location from the Messages panel (right-click then choose Place Specific No ERC for this violation as shown in the images below) or at the violation.

The right-click command makes it easy to place a specific No ERC directive directly at the error location, either from the Messages panel or at the violation.
The right-click command makes it easy to place a specific No ERC directive directly at the error location, either from the Messages panel or at the violation.

Note that No ERC directives cannot be used to suppress all types of error checks. When the No ERC dialog is in the Violation Types mode, it displays a list of the violation types that can be suppressed. Use this as a guide to learn which error tests can be suppressed.

PCB Design Violation Types

Violations Associated with Buses

Violations Associated with Components

Violations Associated with Documents

Violations Associated with Harnesses

Violations Associated with Nets

Violations Associated with Others

Violations Associated with Parameters

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