验证逻辑设计

Once the modules have been connected to each other on the multi-board schematic, the board-to-board connectivity can be verified. This will detect net-to-pin assignment errors and pin-to-pin interconnection wiring errors. These errors can be resolved and corrections pushed down into the affected PCB projects or bought back up to the source system schematic.

Altium Designer can check your multi-board design for logical, electrical, and drafting errors between the design content and project checking settings. There are a number of checks that can be performed on the validated multi-board design. These are for violations concerning the connections between the modules on the sheet, as well as problems associated with mated parts, and these checks are configured as part of the project options.

Configuring the Verification Options and Running the Validation

Select the Project » Project Options command from the main menus to open the Project Options dialog and select its Error Reporting tab. The Report Mode of each violation can be changed to one of four values by clicking on it and selecting the desired value in the drop-down.

Configure the required violation checks on the Error Reporting tab of the Project Options dialog.
Configure the required violation checks on the Error Reporting tab of the Project Options dialog.

To validate your multi-board design, choose the Design » Run ERC command from the main menus or the design space right-click menu.

Validate your multi-board design using the Run ERC command.
Validate your multi-board design using the Run ERC command.

Interpreting Messages and Locating Violations

If validation errors and warnings are detected in the design, a notification is displayed in the Messages panel.

Note that the Messages panel will only open automatically if there is at least one Error or Fatal Error condition. To check for a Warning, you will need to open the panel manually by clicking the  button on the bottom-right of the design space and choosing Messages. Once the project has been validated, the panel will list any warnings and errors that have been detected.

The Messages panel displays the warnings and errors detected in the multi-board design project.
The Messages panel displays the warnings and errors detected in the multi-board design project.

The Messages panel is command central for presenting violations. Things to be aware of include:

  • The Messages panel has two regions – the upper grid region summarizes the violations; the lower region gives details of the currently selected violation.

  • Double-click on a message to cross-probe to that violation. Double-click on a detail to show that specific object.

  • You can click on any of the Messages panel column headings (e.g., Class, Document, Message) to assist in sorting the errors and warnings.

  • Right-click in the Messages panel then use the Group By sub-menu options to group the errors and warnings by specific criteria.

  • Right-click in the Messages panel then use the appropriate Clear command to delete messages or use the Export To Report command to export the messages to a report.

    Clearing messages does not necessarily mean the messages have been resolved. The same unresolved messages will be listed after performing validation again. Message clearance is a visual aid when resolving errors in the design that allows you to manually remove messages as you feel they have been resolved. Validation must be launched again to obtain an up-to-date picture of any violations that still exist.

Multi-board Design Violation Types

The sections below include detailed information about each violation check available for multi-board designs.

Violations Associated with Connections

Violations Associated with Mated Parts

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