Определение проектных требований с помощью проектных директив

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Design Directives are objects that are placed on the schematic during design capture, providing a way of specifying instructions to be passed to other parts of the software. A variety of Design Directives are available, for use in the following two ways:

  • Directives associated with the automatic compilation of source schematic documents.
  • Directives used to pass information defined on a schematic sheet through to the PCB.

The following sections take a closer look at these areas and the associated directives.

Compilation-related Directives

Designs evolve over time and are captured in stages. As each stage is bedded down, it's not uncommon to want to check them in isolation to the rest of the design. Compilation of an individual schematic document (or the entire project) at intermittent stages in the capture process will often yield a number of error messages, caused by circuitry that is yet to be captured, or interface wiring between circuit fragments that are still incomplete. Such messages are of no real value since they only create noise around the real information. The quickest and easiest way to suppress these compilation errors is by placing No ERC or Compile Mask directives.

No ERC Directive

The No ERC directive is placed on a node in the circuit to suppress all reported Electrical Rule Check warnings and/or error violation conditions that are detected when the schematic project is verified. Refer to the Verifying Your Design Project page to learn more.

Compile Mask Directive

No ERC directives are great for suppressing a low number of violating pins, ports, sheet entries, or nets within a design. But in some cases, it may be desirable to remove an entire section of the design; including components. Use a Compile Mask directive (Place » Directives » Compile Mask command) or click the Compile Mask button () in the directives drop-down on the Active Bar to effectively hide the area of the design it contains from the Compiler, allowing you to manually prevent error checking for circuitry that may not yet be complete and you know will generated compile errors. This can prove very useful if you need to compile the active document, or project, to check the integrity of the design in other specific areas but do not want the 'noise' of compiler-generated messages associated with unfinished portions of the design.

As its name suggests, this directive instructs the Compiler to ignore any objects that fall completely within the bounds of the defined mask. Place the mask exactly as you would a note or rectangle object.

Consider the example schematic circuitry in the following image, where the wiring to the LCD1 device is not yet complete. Compiling just this schematic (Project » Validate PCB Project) will result in numerous violation messages (shown below), each of which is caused by the incomplete circuitry. Hover over the image to see the effect of placing a Compile Mask directive around the incomplete circuitry. These violations will be ignored by the Compiler, while the rest of the circuit on the schematic – which is completely wired – is checked. Notice that objects that are truly masked – those that completely fall within the bounding rectangle of the mask – will appear greyed-out.

Roll over the image to show the effect of using a Compile Mask directive to hide compiler violations due to incomplete circuitry.
Roll over the image to show the effect of using a Compile Mask directive to hide compiler violations due to incomplete circuitry.

A compile mask can be displayed in either expanded (full frame) or collapsed (small triangle) modes. These modes correspond to the mask being enabled and disabled, respectively. Toggle the display mode by clicking on the top-left corner of a placed compile mask. This feature can be helpful when simulation is included as part of the design flow: learn more.
While compile masks can be rotated or mirrored along the X or Y axis, this has no effect on the orientation of the design circuitry within.

PCB-related Directives

As a Unified Design Environment, Altium Designer provides the ability for PCB requirements to be defined prior to laying out the board. This is achieved by adding and specifying parameters to objects placed on the schematic sheet(s).

For certain schematic design objects – such as components, sheet symbols, ports, etc – this involves adding the relevant parameter(s) as part of that object's properties. For net objects such as wires and buses, parameters cannot be added directly as a property of the wire or bus. Instead, the parameters required to hold the information are specified using dedicated design directives.

The following information can be specified, using directives, and will be transferred to the appropriate PCB-based definitions during design synchronization:

  • PCB layout constraints
  • Differential pairs
  • Net classes

By including design directives within the Schematic, design engineers can specify explicit design constraints, and it ensures the Schematic remains the master record of the design. Any amendments to the design would be carried out on the schematic side only and pushed across to the PCB. This can become particularly important when multiple people are working on the design – especially if they are geographically separated.  Rather than attempting to communicate with one another through chains of emails, or phone calls, the person capturing the design can ensure that particular constraints are indeed used during the layout phase.

At the heart of this functionality is the Parameter Set directive.

These are essentially user-defined Parameter Set objects, which can be associated with a net object within a schematic design. Place a PCB Layout directive on a wire, bus, or signal harness, to define one or more design constraint targeting the associated net(s). When a PCB is created from the schematic, the information in the PCB layout directive is used to create relevant PCB design rules. The information specified by a PCB Layout directive is applied only to the net (or set of nets) to which the directive is connected.

A Parameter Set directive.
A Parameter Set directive.

This acts as a container for any number of parameters targeting the net that the Parameter Set directive is attached to. A default Parameter Set directive that has no parameters can be placed (Place » Directives » Parameter Set) and the relevant parameter(s) can be added later. The following sections take a closer look at using these parameter-based directives. Both user-defined (Parameter Set) and pre-defined (Differential Pair) parameter set directives are available. The only difference between an empty parameter set and a pre-defined parameter set is that the pre-defined parameter sets include a parameter, as will be described below.

Refer to the Defining Differential Pairs in Your Schematics page to learn more about using Differential Pair directives.

When using the Constraint Manager functionality, note that net classes, differential pairs, differential pair classes, and rules defined using the Parameter Set and Differential Pair directives will not be detected and transferred when updating the PCB from the schematic. Only the net classes, differential pairs, differential pair classes, and rules defined in the Constraint Manager will be transferred.

You can import rules, net classes, differential pairs and differential pair classes from directives placed in schematics using the Import from Directives command from the right-click menu of the Physical or Electrical view of the Constraint Manager when accessed from schematics – learn more.

Placing Parameter Set Directives

Place a directive of this type by choosing the Place » Directives » Parameter Set command from the main menu, or when right-clicking within the design space. When placing a default parameter set directive, there will be no existing parameters. A parameter set is a design directive that allows design specifications to be associated with a net-type object within a schematic design. For example, use a parameter set to declare two nets to be members of a differential pair. It is the presence of specifically named parameters in the parameter set that the software uses to determine which design directive you are placing.

In addition to user-defined parameter directives, a rule-based parameter directive is defined from the Choose Design Rule Type dialog, accessible from the parameter's associated Properties panel mode. Access involves the following:

  1. Press Tab before placing the Parameter Set or double-click an already placed Parameter Set directive to display the Parameter Set mode of the Properties panel.
  2. Next, click the Add button in the Parameters section of the Parameter Set mode of the Properties panel and choose Rule from the drop-down to select a rule from the Choose Design Rule Type dialog.

Editing the value for a rule.
Editing the value for a rule.

Use the Choose Design Rule Type dialog to choose the rule that you wish to add as a rule parameter to the directive. Double-clicking on a rule type will give you access to the relevant Edit PCB Rule (From Schematic) dialog in which you can define the constraints for the rule.

The specific properties that are present in the Edit PCB Rule (From Schematic) dialog are dependent upon the selected design rule, and will be the same as the properties that are defined for that rule in the PCB editor.

For example, the image below shows the Edit PCB Rule (From Schematic) dialog for the Max-Min Width Rule, where you can: configure Min/Preferred/Max settings for all layers, manually define each width setting for each layer, or choose to use an Impedance Profile. If you are selecting an impedance profile and the actual physical board structure has already been defined in the PCB editor, you can also select the board file to Load the PCB Layer Stack and calculate the track width values.

If the PCB exists and the layer stack has been defined, the calculated widths can be loaded into the schematic.If the PCB exists and the layer stack has been defined, the calculated widths can be loaded into the schematic.

The rule shown above was applied to a class of nets. This was achieved by placing a Blanket Directive with a PCB Routing Directive attached to group the nets into a class, and then apply the Max-Min Width Rule to that class (show image).

For detailed information about each of the PCB Design Rules and constraints, click here.

Use the Measurement Units drop-down field to select Metric or Imperial units.

Specifying the constraints for a chosen rule.
Specifying the constraints for a chosen rule.

The entry for the Parameters region will be the rule type chosen, along with the specified constraints. The following image illustrates the defined width constraint rule parameters for a Parameter Set directive. To display the rule within the design space, click the visibility () icon within the Rules region.

Multiple rule constraints defined for a particular net, courtesy of a Parameter Set directive.
Multiple rule constraints defined for a particular net, courtesy of a Parameter Set directive.

When the design is transferred to the PCB, through the synchronization process, the relevant design rules will be created, based on the information contained within a directive. The word Schematic is used in the name for each generated rule, to distinguish the source of that rule.

Generated design rules on the PCB side.
Generated design rules on the PCB side.

Remember that multiple parameters can be added to the same Parameter Set directive, allowing for a neater schematic.

Placing Net Class Directives

A Net Class directive enables you to create user-defined net classes on the schematic. A Net Class directive can be placed by choosing the Place » Directives » Parameter Set command from the main menus then defining the parameter set as a net class directive as specified in Tip #2 on the command page. When a PCB is created from the schematic, the information in a Net Class directive is used to create the corresponding Net Class on the PCB. To make a net a member of a net class, attach a Net Class directive to the relevant wire, bus, or signal harness, then set the directive's ClassName parameter to the name of the desired class. The Generate Net Classes option (for User-Defined Classes) must be enabled on the Class Generation tab of the Project Options dialog to use this feature.

If a Net Class directive has been defined for a net, then any PCB design rules that are also created by that parameter set object will have a rule scope of Net Class when the design is transferred to the PCB editor. A Net Class directive can be created from your placed Parameter Set directive by adding a class that must have its value set to the required PCB Net Class.

While Net Classes can be created from within the PCB editor, the logical function or grouping of nets is usually much clearer in the schematic, and therefore, it makes more sense to drive the process from there.

When the design is transferred to the PCB, through the synchronization process, the relevant net classes will be created, based on the information contained within a directive.

Attach a Net Class directive to a Blanket object, to create a net class whose members are the individual nets covered by that blanket. If a PCB Layout directive is also attached to that blanket, the PCB Layout directive's rule parameters will target that net class, rather than each individual net. When importing the changes into the PCB document, this results in a single design rule being created (per parameter), with a scope set to target the net class.

Placing Blanket Directives

Parameter Set directives can only target the specific net that they are attached to, but when combined with a Blanket directive, their scope can be expanded to cover all nets within the blanket.

Place a directive of this type by choosing the Place » Directives » Blanket command from the main menus. When placing a blanket, you can either define a simple rectangular shape or a polygonal shape. The latter gives more precise control over coverage of the required net objects on a sheet.

The blanket identifies the nets of interest – place a Parameter Set directive anywhere on the edge of the blanket to apply design requirements to those nets. To apply the perimeter directive to a net under a Blanket directive, an object associated with that net – a pin, a port, a net label, a power port, a wire/bus/harness segment (including both ends) – must fall within the bounds of the blanket. Note that for net identifiers, such as net labels, the hotspot must be within the blanket. If member nets do not come across into the PCB Parameter Set as expected, try adjusting the area of the blanket accordingly.

To check which nets the blanket directive will apply to, use the Net Colors feature to highlight them. Choose the required color from the View » Set Net Colors menu, then click on the perimeter of the required Blanket directive. To clear the highlighting for a specific net, use the View » Set Net Colors » Clear Net Color command, then click on the net you wish to remove the coloring from. To clear net coloring from all schematic sheets, use the View » Set Net Colors » Clear All Net Colors command.

An example of using a Blanket directive to apply a Parameter Set directive to nets within the blanket.
An example of using a Blanket directive to apply a Parameter Set directive to nets within the blanket.

Example usage of a blanket directive can include:

  • Attaching a Parameter Set directive to a blanket object to have its rule parameters applied to each individual net covered by that blanket.
  • Attaching a Parameter Set directive to a blanket object to create a Parameter Set whose members are the individual nets covered by that blanket.
  • Attaching a Differential Pair directive to a blanket object to create differential pair objects based on differential nets within the confines of that blanket.
Attach a Parameter Set directive to a Blanket object to have its rule parameters applied to each individual net covered by that blanket. If a Parameter Set directive is also attached to that blanket and the Parameter Set also has a Net Class parameter, the Parameter Set directive's rule parameters will target that net class, rather than each individual net. When importing the changes into the PCB document, this results in a single design rule being created (per parameter) with a scope set to target the net class.
You can also copy a perimeter Parameter Set directive and attach it to another Blanket directive or even individual wires, busses or harnesses – the result will be to add all additional nets associated with the same Parameter Set directive, to the same generated PCB Net Class.

A Blanket, in conjunction with a Parameter Set directive, can also be used for applying component classes and parameters for components that are completely within the area defined by the Blanket. For doing this, use the Component Class and Parameter options from the Add button drop-down in the properties of the Parameter Set directive attached to the Blanket. The information about the component class and parameter will be transferred to the project PCB document during the ECO process when updating the PCB.

Indirect (Parameter-based) Directives

Parameter Set directives are necessary when targeting design objects in the Schematic that can't contain parameters, but for those objects that can, design directives can be applied indirectly by adding (and defining) them as parameters to the relevant schematic object. In essence, they are parameter-based directives.

Examples of how parameter-based directives could be used would include limiting the height of a particular component or adding a clearance constraint targeting all objects in the design. The required parameter that defines the constraint is added to the object as a rule.

When synchronized with the PCB, parameter-based directives that have been added to objects in the schematic will become PCB design rules. The scope of the corresponding PCB design rule will be determined by the nature of the object to which the parameter was first assigned. The following table summarizes the schematic parameter-to-PCB rule scope options that are supported.

Add a Parameter (as a rule) to a... From... For a PCB Rule Scope of...
Pin the Parameters tab of the Pin mode of the Properties panel. Pad
Port the Parameters tab of the Port mode of the Properties panel. Net
Component the Parameters region of the Components mode of the Properties panel. Component
Sheet Symbol the Parameters tab of the Sheet Symbol mode of the Properties panel, when Local is selected in the Source region. Component Class
Device Sheet Symbol the Parameters tab of the Sheet Symbol mode of the Properties panel, when Device is selected in the Source region. Component Class
Managed Sheet Symbol the Parameters region of the Sheet Symbol mode of the Properties panel, when Managed is selected in the Source region. Component Class
Sheet the Parameters tab of the Document Options mode of the Properties panel. All Objects

In each case, the method of adding a rule-based parameter is the same. From the respective tab or dialog, perform the following:

  1. Add a parameter as a rule.
  2. Select which rule type to use.
  3. Configure the constraints for the chosen rule type.
When adding design rule parameters to objects on a schematic, a unique ID is given to each rule parameter. The same IDs are given to the corresponding design rules that are created on the PCB. With this Unique ID, the constraints of a rule can be edited on either the schematic or PCB side, and the changes pushed through upon synchronization.

Specifying Component Classes

In a similar vein, component classes can be defined on the schematic by adding a ClassName parameter to targeted components and setting its value to the desired class name. When the design is transferred to the PCB, the defined component classes will be created.

To ensure Schematic defined Component Classes are propagated to the PCB, the following options must be set in the Project Options dialog:

  • Enable the Generate Component Classes option located in the User-Defined Classes region of the dialog's Class Generation tab.
  • On the dialog's Comparator tab, set the Differences Associated with Components » Extra Component Classes Mode setting to Find Differences.

The above-listed Class Generation tab option is displayed in the image below. Hover over the image to view the Comparator tab option setting.

To propagate Component Classes to the PCB, enable the Generate Component Classes option on the Class Generation tab. Hover over the image to show the Comparator tab where you will need to set the Extra Component Classes Mode setting to Find Differences.
To propagate Component Classes to the PCB, enable the Generate Component Classes option on the Class Generation tab. Hover over the image to show the Comparator tab where you will need to set the Extra Component Classes Mode setting to Find Differences.

Once defined, classes may be locked in the Properties region of the Properties panel of the respective component properties.

In the PCB editor, a component can belong to multiple Component Classes. To define this in the schematic, separate each PCB Component Class name with a comma in the schematic component parameter value (show image).

Controlling the Printing of Directives

By default, all design directives are included in the printing of the schematic sheets. This can, however, be changed:

Control the printing of directives as required. For No ERC directives, you can opt to print certain symbol styles, while excluding others.
Control the printing of directives as required. For No ERC directives, you can opt to print certain symbol styles, while excluding others.

Примечание

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